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soc: add hal api to set exception vector table base address

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This commit is contained in:
morris
2020-03-06 11:08:10 +08:00
parent 63cd2b0613
commit 8b6c0947c7
6 changed files with 29 additions and 12 deletions
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11
components/esp32/cpu_start.c
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@@ -130,10 +130,8 @@ void IRAM_ATTR call_start_cpu0(void)
bootloader_init_mem();
//Move exception vectors to IRAM
asm volatile (\
"wsr %0, vecbase\n" \
::"r"(&_init_start));
// Move exception vectors to IRAM
cpu_hal_set_vecbase(&_init_start);
rst_reas[0] = rtc_get_reset_reason(0);
@@ -273,9 +271,8 @@ static void wdt_reset_cpu1_info_enable(void)
void IRAM_ATTR call_start_cpu1(void)
{
asm volatile (\
"wsr %0, vecbase\n" \
::"r"(&_init_start));
// Move exception vectors to IRAM
cpu_hal_set_vecbase(&_init_start);
ets_set_appcpu_boot_addr(0);