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https://github.com/espressif/esp-idf.git
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esp32: SEGGER SystemView Tracing Support
Implements support for system level traces compatible with SEGGER SystemView tool on top of ESP32 application tracing module. That kind of traces can help to analyse program's behaviour. SystemView can show timeline of tasks/ISRs execution, context switches, statistics related to the CPUs' load distribution etc. Also this commit adds useful feature to ESP32 application tracing module: - Trace data buffering is implemented to handle temporary peaks of events load
This commit is contained in:
@@ -24,6 +24,7 @@
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#include "freertos/task.h"
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#include <esp_types.h>
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#include "esp_err.h"
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//#define LOG_LOCAL_LEVEL ESP_LOG_VERBOSE
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#include "esp_log.h"
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#include "esp_intr.h"
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#include "esp_attr.h"
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@@ -33,7 +34,6 @@
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static const char* TAG = "intr_alloc";
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#define ETS_INTERNAL_TIMER0_INTR_NO 6
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#define ETS_INTERNAL_TIMER1_INTR_NO 15
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#define ETS_INTERNAL_TIMER2_INTR_NO 16
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@@ -74,7 +74,7 @@ typedef struct {
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} int_desc_t;
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//We should mark the interrupt for the timer used by FreeRTOS as reserved. The specific timer
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//We should mark the interrupt for the timer used by FreeRTOS as reserved. The specific timer
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//is selectable using menuconfig; we use these cpp bits to convert that into something we can use in
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//the table below.
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#if CONFIG_FREERTOS_CORETIMER_0
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@@ -159,6 +159,13 @@ struct intr_handle_data_t {
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shared_vector_desc_t *shared_vector_desc;
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};
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typedef struct non_shared_isr_arg_t non_shared_isr_arg_t;
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struct non_shared_isr_arg_t {
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intr_handler_t isr;
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void *isr_arg;
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int source;
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};
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//Linked list of vector descriptions, sorted by cpu.intno value
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static vector_desc_t *vector_desc_head;
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@@ -169,12 +176,15 @@ static uint32_t non_iram_int_mask[portNUM_PROCESSORS];
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static uint32_t non_iram_int_disabled[portNUM_PROCESSORS];
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static bool non_iram_int_disabled_flag[portNUM_PROCESSORS];
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#if CONFIG_SYSVIEW_ENABLE
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extern uint32_t port_switch_flag[];
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#endif
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static portMUX_TYPE spinlock = portMUX_INITIALIZER_UNLOCKED;
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//Inserts an item into vector_desc list so that the list is sorted
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//with an incrementing cpu.intno value.
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static void insert_vector_desc(vector_desc_t *to_insert)
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static void insert_vector_desc(vector_desc_t *to_insert)
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{
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vector_desc_t *vd=vector_desc_head;
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vector_desc_t *prev=NULL;
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@@ -195,7 +205,7 @@ static void insert_vector_desc(vector_desc_t *to_insert)
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}
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//Returns a vector_desc entry for an intno/cpu, or NULL if none exists.
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static vector_desc_t *find_desc_for_int(int intno, int cpu)
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static vector_desc_t *find_desc_for_int(int intno, int cpu)
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{
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vector_desc_t *vd=vector_desc_head;
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while(vd!=NULL) {
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@@ -208,7 +218,7 @@ static vector_desc_t *find_desc_for_int(int intno, int cpu)
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//Returns a vector_desc entry for an intno/cpu.
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//Either returns a preexisting one or allocates a new one and inserts
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//it into the list. Returns NULL on malloc fail.
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static vector_desc_t *get_desc_for_int(int intno, int cpu)
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static vector_desc_t *get_desc_for_int(int intno, int cpu)
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{
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vector_desc_t *vd=find_desc_for_int(intno, cpu);
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if (vd==NULL) {
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@@ -234,7 +244,7 @@ esp_err_t esp_intr_mark_shared(int intno, int cpu, bool is_int_ram)
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if (vd==NULL) {
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portEXIT_CRITICAL(&spinlock);
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return ESP_ERR_NO_MEM;
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}
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}
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vd->flags=VECDESC_FL_SHARED;
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if (is_int_ram) vd->flags|=VECDESC_FL_INIRAM;
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portEXIT_CRITICAL(&spinlock);
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@@ -252,16 +262,16 @@ esp_err_t esp_intr_reserve(int intno, int cpu)
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if (vd==NULL) {
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portEXIT_CRITICAL(&spinlock);
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return ESP_ERR_NO_MEM;
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}
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}
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vd->flags=VECDESC_FL_RESERVED;
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portEXIT_CRITICAL(&spinlock);
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return ESP_OK;
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}
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//Interrupt handler table and unhandled uinterrupt routine. Duplicated
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//from xtensa_intr.c... it's supposed to be private, but we need to look
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//into it in order to see if someone allocated an int using
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//Interrupt handler table and unhandled uinterrupt routine. Duplicated
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//from xtensa_intr.c... it's supposed to be private, but we need to look
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//into it in order to see if someone allocated an int using
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//xt_set_interrupt_handler.
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typedef struct xt_handler_table_entry {
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void * handler;
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@@ -271,7 +281,7 @@ extern xt_handler_table_entry _xt_interrupt_table[XCHAL_NUM_INTERRUPTS*portNUM_P
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extern void xt_unhandled_interrupt(void * arg);
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//Returns true if handler for interrupt is not the default unhandled interrupt handler
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static bool int_has_handler(int intr, int cpu)
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static bool int_has_handler(int intr, int cpu)
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{
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return (_xt_interrupt_table[intr*portNUM_PROCESSORS+cpu].handler != xt_unhandled_interrupt);
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}
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@@ -303,8 +313,8 @@ static int get_free_int(int flags, int cpu, int force)
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ALCHLOG(TAG, "Ignoring int %d: forced to %d", x, force);
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continue;
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}
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ALCHLOG(TAG, "Int %d reserved %d level %d %s hasIsr %d",
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x, int_desc[x].cpuflags[cpu]==INTDESC_RESVD, int_desc[x].level,
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ALCHLOG(TAG, "Int %d reserved %d level %d %s hasIsr %d",
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x, int_desc[x].cpuflags[cpu]==INTDESC_RESVD, int_desc[x].level,
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int_desc[x].type==INTTP_LEVEL?"LEVEL":"EDGE", int_has_handler(x, cpu));
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//Check if interrupt is not reserved by design
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if (int_desc[x].cpuflags[cpu]==INTDESC_RESVD) {
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@@ -321,7 +331,7 @@ static int get_free_int(int flags, int cpu, int force)
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continue;
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}
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//check if edge/level type matches what we want
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if (((flags&ESP_INTR_FLAG_EDGE) && (int_desc[x].type==INTTP_LEVEL)) ||
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if (((flags&ESP_INTR_FLAG_EDGE) && (int_desc[x].type==INTTP_LEVEL)) ||
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(((!(flags&ESP_INTR_FLAG_EDGE)) && (int_desc[x].type==INTTP_EDGE)))) {
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ALCHLOG(TAG, "....Unusable: incompatible trigger type");
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continue;
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@@ -373,7 +383,7 @@ static int get_free_int(int flags, int cpu, int force)
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}
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} else {
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if (best==-1) {
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//We haven't found a feasible shared interrupt yet. This one is still free and usable, even if
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//We haven't found a feasible shared interrupt yet. This one is still free and usable, even if
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//not marked as shared.
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//Remember it in case we don't find any other shared interrupt that qualifies.
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if (bestLevel>int_desc[x].level) {
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@@ -406,9 +416,8 @@ static int get_free_int(int flags, int cpu, int force)
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return best;
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}
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//Common shared isr handler. Chain-call all ISRs.
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static void IRAM_ATTR shared_intr_isr(void *arg)
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static void IRAM_ATTR shared_intr_isr(void *arg)
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{
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vector_desc_t *vd=(vector_desc_t*)arg;
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shared_vector_desc_t *sh_vec=vd->shared_vec_info;
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@@ -416,7 +425,16 @@ static void IRAM_ATTR shared_intr_isr(void *arg)
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while(sh_vec) {
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if (!sh_vec->disabled) {
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if ((sh_vec->statusreg == NULL) || (*sh_vec->statusreg & sh_vec->statusmask)) {
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#if CONFIG_SYSVIEW_ENABLE
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traceISR_ENTER(sh_vec->source+ETS_INTERNAL_INTR_SOURCE_OFF);
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#endif
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sh_vec->isr(sh_vec->arg);
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#if CONFIG_SYSVIEW_ENABLE
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// check if we will return to scheduler or to interrupted task after ISR
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if (!port_switch_flag[xPortGetCoreID()]) {
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traceISR_EXIT();
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}
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#endif
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}
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}
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sh_vec=sh_vec->next;
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@@ -424,10 +442,27 @@ static void IRAM_ATTR shared_intr_isr(void *arg)
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portEXIT_CRITICAL(&spinlock);
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}
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#if CONFIG_SYSVIEW_ENABLE
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//Common non-shared isr handler wrapper.
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static void IRAM_ATTR non_shared_intr_isr(void *arg)
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{
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non_shared_isr_arg_t *ns_isr_arg=(non_shared_isr_arg_t*)arg;
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portENTER_CRITICAL(&spinlock);
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traceISR_ENTER(ns_isr_arg->source+ETS_INTERNAL_INTR_SOURCE_OFF);
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// FIXME: can we call ISR and check port_switch_flag after releasing spinlock?
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// when CONFIG_SYSVIEW_ENABLE = 0 ISRs for non-shared IRQs are called without spinlock
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ns_isr_arg->isr(ns_isr_arg->isr_arg);
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// check if we will return to scheduler or to interrupted task after ISR
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if (!port_switch_flag[xPortGetCoreID()]) {
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traceISR_EXIT();
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}
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portEXIT_CRITICAL(&spinlock);
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}
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#endif
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//We use ESP_EARLY_LOG* here because this can be called before the scheduler is running.
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esp_err_t esp_intr_alloc_intrstatus(int source, int flags, uint32_t intrstatusreg, uint32_t intrstatusmask, intr_handler_t handler,
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void *arg, intr_handle_t *ret_handle)
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esp_err_t esp_intr_alloc_intrstatus(int source, int flags, uint32_t intrstatusreg, uint32_t intrstatusmask, intr_handler_t handler,
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void *arg, intr_handle_t *ret_handle)
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{
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intr_handle_data_t *ret=NULL;
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int force=-1;
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@@ -456,7 +491,7 @@ esp_err_t esp_intr_alloc_intrstatus(int source, int flags, uint32_t intrstatusre
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}
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}
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ESP_EARLY_LOGV(TAG, "esp_intr_alloc_intrstatus (cpu %d): Args okay. Resulting flags 0x%X", xPortGetCoreID(), flags);
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//Check 'special' interrupt sources. These are tied to one specific interrupt, so we
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//have to force get_free_int to only look at that.
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if (source==ETS_INTERNAL_TIMER0_INTR_SOURCE) force=ETS_INTERNAL_TIMER0_INTR_NO;
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@@ -513,7 +548,20 @@ esp_err_t esp_intr_alloc_intrstatus(int source, int flags, uint32_t intrstatusre
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//Mark as unusable for other interrupt sources. This is ours now!
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vd->flags=VECDESC_FL_NONSHARED;
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if (handler) {
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#if CONFIG_SYSVIEW_ENABLE
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non_shared_isr_arg_t *ns_isr_arg=malloc(sizeof(non_shared_isr_arg_t));
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if (!ns_isr_arg) {
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portEXIT_CRITICAL(&spinlock);
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free(ret);
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return ESP_ERR_NO_MEM;
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}
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ns_isr_arg->isr=handler;
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ns_isr_arg->isr_arg=arg;
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ns_isr_arg->source=source;
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xt_set_interrupt_handler(intr, non_shared_intr_isr, ns_isr_arg);
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#else
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xt_set_interrupt_handler(intr, handler, arg);
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#endif
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}
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if (flags&ESP_INTR_FLAG_EDGE) xthal_set_intclear(1 << intr);
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vd->source=source;
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@@ -555,18 +603,18 @@ esp_err_t esp_intr_alloc_intrstatus(int source, int flags, uint32_t intrstatusre
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return ESP_OK;
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}
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esp_err_t esp_intr_alloc(int source, int flags, intr_handler_t handler, void *arg, intr_handle_t *ret_handle)
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esp_err_t esp_intr_alloc(int source, int flags, intr_handler_t handler, void *arg, intr_handle_t *ret_handle)
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{
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/*
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As an optimization, we can create a table with the possible interrupt status registers and masks for every single
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source there is. We can then add code here to look up an applicable value and pass that to the
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source there is. We can then add code here to look up an applicable value and pass that to the
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esp_intr_alloc_intrstatus function.
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*/
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return esp_intr_alloc_intrstatus(source, flags, 0, 0, handler, arg, ret_handle);
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}
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esp_err_t esp_intr_free(intr_handle_t handle)
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esp_err_t esp_intr_free(intr_handle_t handle)
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{
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bool free_shared_vector=false;
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if (!handle) return ESP_ERR_INVALID_ARG;
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@@ -576,7 +624,7 @@ esp_err_t esp_intr_free(intr_handle_t handle)
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portENTER_CRITICAL(&spinlock);
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esp_intr_disable(handle);
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if (handle->vector_desc->flags&VECDESC_FL_SHARED) {
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//Find and kill the shared int
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//Find and kill the shared int
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shared_vector_desc_t *svd=handle->vector_desc->shared_vec_info;
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shared_vector_desc_t *prevsvd=NULL;
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assert(svd); //should be something in there for a shared int
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@@ -601,11 +649,19 @@ esp_err_t esp_intr_free(intr_handle_t handle)
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if ((handle->vector_desc->flags&VECDESC_FL_NONSHARED) || free_shared_vector) {
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ESP_LOGV(TAG, "esp_intr_free: Disabling int, killing handler");
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#if CONFIG_SYSVIEW_ENABLE
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if (!free_shared_vector) {
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void *isr_arg = xt_get_interrupt_handler_arg(handle->vector_desc->intno);
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if (isr_arg) {
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free(isr_arg);
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}
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}
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#endif
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//Reset to normal handler
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xt_set_interrupt_handler(handle->vector_desc->intno, xt_unhandled_interrupt, (void*)((int)handle->vector_desc->intno));
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//Theoretically, we could free the vector_desc... not sure if that's worth the few bytes of memory
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//we save.(We can also not use the same exit path for empty shared ints anymore if we delete
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//the desc.) For now, just mark it as free.
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//we save.(We can also not use the same exit path for empty shared ints anymore if we delete
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//the desc.) For now, just mark it as free.
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handle->vector_desc->flags&=!(VECDESC_FL_NONSHARED|VECDESC_FL_RESERVED);
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//Also kill non_iram mask bit.
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non_iram_int_mask[handle->vector_desc->cpu]&=~(1<<(handle->vector_desc->intno));
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