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Merge branch 'feature/c5_c61_efuse_update' into 'master'

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feat(efuse): Update efuses for C5 and C61

Closes IDF-8629 and IDF-8674

See merge request espressif/esp-idf!29627
This commit is contained in:
Konstantin Kondrashov
2024-03-22 18:02:37 +08:00
parent f7984936e3 25bc10e143
commit 8d6562d1f1
35 changed files with 4482 additions and 3285 deletions
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70
components/hal/esp32c5/efuse_hal.c
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@@ -38,75 +38,59 @@ IRAM_ATTR uint32_t efuse_hal_get_minor_chip_version(void)
void efuse_hal_set_timing(uint32_t apb_freq_hz)
{
(void) apb_freq_hz;
// TODO: [ESP32C5] IDF-8674
abort();
// efuse_ll_set_dac_num(0xFF);
// efuse_ll_set_dac_clk_div(0x28);
// efuse_ll_set_pwr_on_num(0x3000);
// efuse_ll_set_pwr_off_num(0x190);
}
void efuse_hal_read(void)
{
// TODO: [ESP32C5] IDF-8674
abort();
// efuse_hal_set_timing(0);
efuse_hal_set_timing(0);
// efuse_ll_set_conf_read_op_code();
// efuse_ll_set_read_cmd();
efuse_ll_set_conf_read_op_code();
efuse_ll_set_read_cmd();
// while (efuse_ll_get_read_cmd() != 0) { }
// /*Due to a hardware error, we have to read READ_CMD again to make sure the efuse clock is normal*/
// while (efuse_ll_get_read_cmd() != 0) { }
while (efuse_ll_get_read_cmd() != 0) { }
/*Due to a hardware error, we have to read READ_CMD again to make sure the efuse clock is normal*/
while (efuse_ll_get_read_cmd() != 0) { }
}
void efuse_hal_clear_program_registers(void)
{
// TODO: [ESP32C5] IDF-8674
abort();
// ets_efuse_clear_program_registers();
ets_efuse_clear_program_registers();
}
void efuse_hal_program(uint32_t block)
{
// TODO: [ESP32C5] IDF-8674
abort();
// efuse_hal_set_timing(0);
efuse_hal_set_timing(0);
// efuse_ll_set_conf_write_op_code();
// efuse_ll_set_pgm_cmd(block);
efuse_ll_set_conf_write_op_code();
efuse_ll_set_pgm_cmd(block);
// while (efuse_ll_get_pgm_cmd() != 0) { }
while (efuse_ll_get_pgm_cmd() != 0) { }
// efuse_hal_clear_program_registers();
// efuse_hal_read();
efuse_hal_clear_program_registers();
efuse_hal_read();
}
void efuse_hal_rs_calculate(const void *data, void *rs_values)
{
// TODO: [ESP32C5] IDF-8674
abort();
// ets_efuse_rs_calculate(data, rs_values);
ets_efuse_rs_calculate(data, rs_values);
}
/******************* eFuse control functions *************************/
bool efuse_hal_is_coding_error_in_block(unsigned block)
{
// TODO: [ESP32C5] IDF-8674
abort();
// if (block == 0) {
// for (unsigned i = 0; i < 5; i++) {
// if (REG_READ(EFUSE_RD_REPEAT_ERR0_REG + i * 4)) {
// return true;
// }
// }
// } else if (block <= 10) {
// // EFUSE_RD_RS_ERR0_REG: (hi) BLOCK8, BLOCK7, BLOCK6, BLOCK5, BLOCK4, BLOCK3, BLOCK2, BLOCK1 (low)
// // EFUSE_RD_RS_ERR1_REG: BLOCK10, BLOCK9
// block--;
// uint32_t error_reg = REG_READ(EFUSE_RD_RS_ERR0_REG + (block / 8) * 4);
// return ESP_EFUSE_BLOCK_ERROR_BITS(error_reg, block % 8) != 0;
// }
if (block == 0) {
for (unsigned i = 0; i < 5; i++) {
if (REG_READ(EFUSE_RD_REPEAT_DATA_ERR0_REG + i * 4)) {
return true;
}
}
} else if (block <= 10) {
// EFUSE_RD_RS_ERR0_REG: (hi) BLOCK8, BLOCK7, BLOCK6, BLOCK5, BLOCK4, BLOCK3, BLOCK2, BLOCK1 (low)
// EFUSE_RD_RS_ERR1_REG: BLOCK10, BLOCK9
block--;
uint32_t error_reg = REG_READ(EFUSE_RD_RS_DATA_ERR0_REG + (block / 8) * 4);
return ESP_EFUSE_BLOCK_ERROR_BITS(error_reg, block % 8) != 0;
}
return false;
}

69
components/hal/esp32c5/include/hal/efuse_hal.h Normal file
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@@ -0,0 +1,69 @@
/*
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include <stdint.h>
#include <stdbool.h>
#include "soc/soc_caps.h"
#include "hal/efuse_ll.h"
#include_next "hal/efuse_hal.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief get chip version
*/
uint32_t efuse_hal_get_chip_revision(void);
/**
* @brief set eFuse timings
*
* @param apb_freq_hz APB frequency in Hz
*/
void efuse_hal_set_timing(uint32_t apb_freq_hz);
/**
* @brief trigger eFuse read operation
*/
void efuse_hal_read(void);
/**
* @brief clear registers for programming eFuses
*/
void efuse_hal_clear_program_registers(void);
/**
* @brief burn eFuses written in programming registers (one block at once)
*
* @param block block number
*/
void efuse_hal_program(uint32_t block);
/**
* @brief Calculate Reed-Solomon Encoding values for a block of efuse data.
*
* @param data Pointer to data buffer (length 32 bytes)
* @param rs_values Pointer to write encoded data to (length 12 bytes)
*/
void efuse_hal_rs_calculate(const void *data, void *rs_values);
/**
* @brief Checks coding error in a block
*
* @param block Index of efuse block
*
* @return True - block has an error.
* False - no error.
*/
bool efuse_hal_is_coding_error_in_block(unsigned block);
#ifdef __cplusplus
}
#endif

69
components/hal/esp32c5/include/hal/efuse_ll.h
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@@ -8,8 +8,11 @@
#include <stdint.h>
#include <stdbool.h>
#include "soc/efuse_defs.h"
#include "soc/efuse_reg.h"
#include "soc/efuse_periph.h"
#include "hal/assert.h"
#include "rom/efuse.h"
#ifdef __cplusplus
extern "C" {
@@ -21,148 +24,112 @@ extern "C" {
__attribute__((always_inline)) static inline uint32_t efuse_ll_get_flash_crypt_cnt(void)
{
// TODO: [ESP32C5] IDF-8674 (inherit from C6)
// return EFUSE.rd_repeat_data1.spi_boot_crypt_cnt;
return (uint32_t)0;
return EFUSE.rd_repeat_data1.spi_boot_crypt_cnt;
}
__attribute__((always_inline)) static inline uint32_t efuse_ll_get_wdt_delay_sel(void)
{
// TODO: [ESP32C5] IDF-8674 (inherit from C6)
// return EFUSE.rd_repeat_data1.wdt_delay_sel;
return (uint32_t)0;
return EFUSE.rd_repeat_data1.wdt_delay_sel;
}
__attribute__((always_inline)) static inline uint32_t efuse_ll_get_mac0(void)
{
// TODO: [ESP32C5] IDF-8674 (inherit from C6)
// return EFUSE.rd_mac_sys_0.mac_0;
return (uint32_t)0;
return EFUSE.rd_mac_sys0.mac_0;
}
__attribute__((always_inline)) static inline uint32_t efuse_ll_get_mac1(void)
{
// TODO: [ESP32C5] IDF-8674 (inherit from C6)
// return EFUSE.rd_mac_sys_1.mac_1;
return (uint32_t)0;
return EFUSE.rd_mac_sys1.mac_1;
}
__attribute__((always_inline)) static inline bool efuse_ll_get_secure_boot_v2_en(void)
{
// TODO: [ESP32C5] IDF-8674 (inherit from C6)
// return EFUSE.rd_repeat_data2.secure_boot_en;
return (bool)0;
return EFUSE.rd_repeat_data2.secure_boot_en;
}
// use efuse_hal_get_major_chip_version() to get major chip version
__attribute__((always_inline)) static inline uint32_t efuse_ll_get_chip_wafer_version_major(void)
{
// TODO: [ESP32C5] IDF-8674 (inherit from C6)
// // return EFUSE.rd_mac_sys_5;
// return 0;
return (uint32_t)0;
}
// use efuse_hal_get_minor_chip_version() to get minor chip version
__attribute__((always_inline)) static inline uint32_t efuse_ll_get_chip_wafer_version_minor(void)
{
// TODO: [ESP32C5] IDF-8674 (inherit from C6)
// return 0;
return (uint32_t)0;
}
__attribute__((always_inline)) static inline bool efuse_ll_get_disable_wafer_version_major(void)
{
// TODO: [ESP32C5] IDF-8674 (inherit from C6)
// return 0;
return (bool)0;
}
__attribute__((always_inline)) static inline uint32_t efuse_ll_get_blk_version_major(void)
{
// TODO: [ESP32C5] IDF-8674 (inherit from C6)
// return 0;
return (uint32_t)0;
}
__attribute__((always_inline)) static inline uint32_t efuse_ll_get_blk_version_minor(void)
{
// TODO: [ESP32C5] IDF-8674 (inherit from C6)
// return 0;
return (uint32_t)0;
}
__attribute__((always_inline)) static inline bool efuse_ll_get_disable_blk_version_major(void)
{
// TODO: [ESP32C5] IDF-8674 (inherit from C6)
// return 0;
return (bool)0;
}
__attribute__((always_inline)) static inline uint32_t efuse_ll_get_chip_ver_pkg(void)
{
// TODO: [ESP32C5] IDF-8674 (inherit from C6)
// return 0;
return (uint32_t)0;
}
__attribute__((always_inline)) static inline void efuse_ll_set_ecdsa_key_blk(int efuse_blk)
{
// TODO: [ESP32C5] IDF-8674 (inherit from C6)
// EFUSE.conf.cfg_ecdsa_blk = efuse_blk;
EFUSE.conf.cfg_ecdsa_blk = efuse_blk;
}
/******************* eFuse control functions *************************/
__attribute__((always_inline)) static inline bool efuse_ll_get_read_cmd(void)
{
// TODO: [ESP32C5] IDF-8674 (inherit from C6)
// return EFUSE.cmd.read_cmd;
return (bool)0;
return EFUSE.cmd.read_cmd;
}
__attribute__((always_inline)) static inline bool efuse_ll_get_pgm_cmd(void)
{
// TODO: [ESP32C5] IDF-8674 (inherit from C6)
// return EFUSE.cmd.pgm_cmd;
return (bool)0;
return EFUSE.cmd.pgm_cmd;
}
__attribute__((always_inline)) static inline void efuse_ll_set_read_cmd(void)
{
// TODO: [ESP32C5] IDF-8674 (inherit from C6)
// EFUSE.cmd.read_cmd = 1;
EFUSE.cmd.read_cmd = 1;
}
__attribute__((always_inline)) static inline void efuse_ll_set_pgm_cmd(uint32_t block)
{
// TODO: [ESP32C5] IDF-8674 (inherit from C6)
// HAL_ASSERT(block < ETS_EFUSE_BLOCK_MAX);
// EFUSE.cmd.val = ((block << EFUSE_BLK_NUM_S) & EFUSE_BLK_NUM_M) | EFUSE_PGM_CMD;
HAL_ASSERT(block < ETS_EFUSE_BLOCK_MAX);
EFUSE.cmd.val = ((block << EFUSE_BLK_NUM_S) & EFUSE_BLK_NUM_M) | EFUSE_PGM_CMD;
}
__attribute__((always_inline)) static inline void efuse_ll_set_conf_read_op_code(void)
{
// TODO: [ESP32C5] IDF-8674 (inherit from C6)
// EFUSE.conf.op_code = EFUSE_READ_OP_CODE;
EFUSE.conf.op_code = EFUSE_READ_OP_CODE;
}
__attribute__((always_inline)) static inline void efuse_ll_set_conf_write_op_code(void)
{
// TODO: [ESP32C5] IDF-8674 (inherit from C6)
// EFUSE.conf.op_code = EFUSE_WRITE_OP_CODE;
EFUSE.conf.op_code = EFUSE_WRITE_OP_CODE;
}
__attribute__((always_inline)) static inline void efuse_ll_set_pwr_off_num(uint16_t value)
{
// TODO: [ESP32C5] IDF-8674 (inherit from C6)
// EFUSE.wr_tim_conf2.pwr_off_num = value;
EFUSE.wr_tim_conf2.pwr_off_num = value;
}
__attribute__((always_inline)) static inline void efuse_ll_rs_bypass_update(void)
{
// TODO: [ESP32C5] IDF-8674 (inherit from C6)
// EFUSE.wr_tim_conf0_rs_bypass.update = 1;
EFUSE.wr_tim_conf0_rs_bypass.update = 1;
}
/******************* eFuse control functions *************************/