mirror of
https://github.com/espressif/esp-idf.git
synced 2025-10-07 05:35:16 +00:00
fix(gpio): fix IO output enable control
oen_sel and oen_inv_sel fields from func_out_sel_cfg register
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@@ -207,7 +207,7 @@ esp_err_t gpio_output_disable(gpio_num_t gpio_num)
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{
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GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
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gpio_hal_output_disable(gpio_context.gpio_hal, gpio_num);
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gpio_hal_matrix_out_default(gpio_context.gpio_hal, gpio_num); // Ensure no other output signal is routed via GPIO matrix to this pin
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gpio_hal_set_output_enable_ctrl(gpio_context.gpio_hal, gpio_num, false, false); // so that output disable could take effect
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return ESP_OK;
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}
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@@ -800,7 +800,8 @@ void gpio_iomux_in(uint32_t gpio, uint32_t signal_idx)
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void gpio_iomux_out(uint8_t gpio_num, int func, bool out_en_inv)
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{
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gpio_hal_iomux_out(gpio_context.gpio_hal, gpio_num, func, (uint32_t)out_en_inv);
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(void)out_en_inv; // out_en_inv only takes effect when signal goes through gpio matrix to the IO
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gpio_hal_iomux_out(gpio_context.gpio_hal, gpio_num, func);
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}
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static esp_err_t gpio_sleep_pullup_en(gpio_num_t gpio_num)
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@@ -1031,12 +1032,14 @@ esp_err_t gpio_dump_io_configuration(FILE *out_stream, uint64_t io_bit_mask)
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bool pd = 0;
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bool ie = 0;
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bool oe = 0;
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bool oe_ctrl_by_periph = 0;
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bool oe_inv = 0;
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bool od = 0;
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bool slp_sel = 0;
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uint32_t drv = 0;
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uint32_t fun_sel = 0;
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uint32_t sig_out = 0;
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gpio_hal_get_io_config(gpio_context.gpio_hal, gpio_num, &pu, &pd, &ie, &oe, &od, &drv, &fun_sel, &sig_out, &slp_sel);
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gpio_hal_get_io_config(gpio_context.gpio_hal, gpio_num, &pu, &pd, &ie, &oe, &oe_ctrl_by_periph, &oe_inv, &od, &drv, &fun_sel, &sig_out, &slp_sel);
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#if !SOC_GPIO_SUPPORT_RTC_INDEPENDENT && SOC_RTCIO_PIN_COUNT > 0
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if (rtc_gpio_is_valid_gpio(gpio_num)) {
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int rtcio_num = rtc_io_number_get(gpio_num);
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@@ -1046,11 +1049,18 @@ esp_err_t gpio_dump_io_configuration(FILE *out_stream, uint64_t io_bit_mask)
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}
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#endif
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// When the IO is used as a simple GPIO output, oe signal can only be controlled by the oe register
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// When the IO is not used as a simple GPIO output, oe signal could be controlled by the peripheral
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const char *oe_str = oe ? "1" : "0";
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if (sig_out != SIG_GPIO_OUT_IDX && oe_ctrl_by_periph) {
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oe_str = "[periph_sig_ctrl]";
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}
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fprintf(out_stream, "IO[%"PRIu32"]%s -\n", gpio_num, esp_gpio_is_reserved(BIT64(gpio_num)) ? " **RESERVED**" : "");
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fprintf(out_stream, " Pullup: %d, Pulldown: %d, DriveCap: %"PRIu32"\n", pu, pd, drv);
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fprintf(out_stream, " InputEn: %d, OutputEn: %d, OpenDrain: %d\n", ie, oe, od);
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fprintf(out_stream, " InputEn: %d, OutputEn: %s%s, OpenDrain: %d\n", ie, oe_str, ((fun_sel == PIN_FUNC_GPIO) && (oe_inv)) ? " (inversed)" : "", od);
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fprintf(out_stream, " FuncSel: %"PRIu32" (%s)\n", fun_sel, (fun_sel == PIN_FUNC_GPIO) ? "GPIO" : "IOMUX");
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if (oe && fun_sel == PIN_FUNC_GPIO) {
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if (fun_sel == PIN_FUNC_GPIO) {
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fprintf(out_stream, " GPIO Matrix SigOut ID: %"PRIu32"%s\n", sig_out, (sig_out == SIG_GPIO_OUT_IDX) ? " (simple GPIO output)" : "");
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}
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if (ie && fun_sel == PIN_FUNC_GPIO) {
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