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esp_phy: support phy init on esp32h2 chip
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72
components/esp_phy/src/phy_init_esp32hxx.c
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72
components/esp_phy/src/phy_init_esp32hxx.c
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// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "esp_attr.h"
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#include "freertos/portmacro.h"
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#include "esp_phy_init.h"
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#include "phy.h"
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#define PHY_ENABLE_VERSION_PRINT 1
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static DRAM_ATTR portMUX_TYPE s_phy_int_mux = portMUX_INITIALIZER_UNLOCKED;
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extern void phy_version_print(void);
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static _lock_t s_phy_access_lock;
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/* Reference count of enabling PHY */
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static uint8_t s_phy_access_ref = 0;
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extern void bt_bb_v2_init_cmplx(int print_version);
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uint32_t IRAM_ATTR phy_enter_critical(void)
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{
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if (xPortInIsrContext()) {
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portENTER_CRITICAL_ISR(&s_phy_int_mux);
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} else {
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portENTER_CRITICAL(&s_phy_int_mux);
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}
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// Interrupt level will be stored in current tcb, so always return zero.
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return 0;
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}
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void IRAM_ATTR phy_exit_critical(uint32_t level)
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{
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// Param level don't need any more, ignore it.
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if (xPortInIsrContext()) {
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portEXIT_CRITICAL_ISR(&s_phy_int_mux);
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} else {
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portEXIT_CRITICAL(&s_phy_int_mux);
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}
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}
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void esp_phy_enable(void)
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{
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_lock_acquire(&s_phy_access_lock);
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if (s_phy_access_ref == 0) {
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register_chipv7_phy(NULL, NULL, PHY_RF_CAL_FULL);
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bt_bb_v2_init_cmplx(PHY_ENABLE_VERSION_PRINT);
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phy_version_print();
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}
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s_phy_access_ref++;
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_lock_release(&s_phy_access_lock);
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// ESP32H2-TODO: enable common clk.
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}
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void esp_phy_disable(void)
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{
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// ESP32H2-TODO: close rf and disable clk for modem sleep and light sleep
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}
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