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gpio: Fix the bug that gpio interrupt cannot be triggered on app cpu on ESP32S3

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Add a test case for checking the interrupt on other cores.

Closes https://github.com/espressif/esp-idf/issues/7885
This commit is contained in:
songruojing
2021-11-15 12:11:40 +08:00
parent 0e8286c57b
commit 91f1159f9c
4 changed files with 57 additions and 24 deletions
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14
components/hal/esp32s3/include/hal/gpio_ll.h
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@@ -29,8 +29,9 @@ extern "C" {
// Get GPIO hardware instance with giving gpio num
#define GPIO_LL_GET_HW(num) (((num) == 0) ? (&GPIO) : NULL)
#define GPIO_LL_PRO_CPU_INTR_ENA (BIT(0))
#define GPIO_LL_PRO_CPU_NMI_INTR_ENA (BIT(1))
// On ESP32S3, pro cpu and app cpu shares the same interrupt enable bit
#define GPIO_LL_INTR_ENA (BIT(0))
#define GPIO_LL_NMI_INTR_ENA (BIT(1))
/**
* @brief Enable pull-up on GPIO.
@@ -97,6 +98,8 @@ static inline void gpio_ll_set_intr_type(gpio_dev_t *hw, gpio_num_t gpio_num, gp
*/
static inline void gpio_ll_get_intr_status(gpio_dev_t *hw, uint32_t core_id, uint32_t *status)
{
// On ESP32S3, pcpu_int register represents GPIO0-31 interrupt status on both cores
(void)core_id;
*status = hw->pcpu_int;
}
@@ -109,6 +112,8 @@ static inline void gpio_ll_get_intr_status(gpio_dev_t *hw, uint32_t core_id, uin
*/
static inline void gpio_ll_get_intr_status_high(gpio_dev_t *hw, uint32_t core_id, uint32_t *status)
{
// On ESP32S3, pcpu_int1 register represents GPIO32-48 interrupt status on both cores
(void)core_id;
*status = hw->pcpu_int1.intr;
}
@@ -143,9 +148,8 @@ static inline void gpio_ll_clear_intr_status_high(gpio_dev_t *hw, uint32_t mask)
*/
static inline void gpio_ll_intr_enable_on_core(gpio_dev_t *hw, uint32_t core_id, gpio_num_t gpio_num)
{
if (core_id == 0) {
GPIO.pin[gpio_num].int_ena = GPIO_LL_PRO_CPU_INTR_ENA; //enable pro cpu intr
}
(void)core_id;
GPIO.pin[gpio_num].int_ena = GPIO_LL_INTR_ENA; //enable intr
}
/**