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uart: Support LP_UART port with UART driver on esp32c6

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This commit is contained in:
Song Ruo Jing
2023-03-24 11:42:01 +08:00
parent b77540c285
commit 921713fff4
68 changed files with 1127 additions and 401 deletions
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13
components/hal/esp32c3/include/hal/uart_ll.h
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@@ -10,9 +10,10 @@
#pragma once
#include <stdlib.h>
#include "hal/misc.h"
#include "hal/uart_types.h"
#include "soc/uart_periph.h"
#include "soc/uart_reg.h"
#include "soc/uart_struct.h"
#include "esp_attr.h"
@@ -23,7 +24,7 @@ extern "C" {
// The default fifo depth
#define UART_LL_FIFO_DEF_LEN (SOC_UART_FIFO_LEN)
// Get UART hardware instance with giving uart num
#define UART_LL_GET_HW(num) (((num) == 0) ? (&UART0) : (&UART1))
#define UART_LL_GET_HW(num) (((num) == UART_NUM_0) ? (&UART0) : (&UART1))
#define UART_LL_MIN_WAKEUP_THRESH (2)
#define UART_LL_INTR_MASK (0x7ffff) //All interrupt mask
@@ -105,10 +106,9 @@ FORCE_INLINE_ATTR void uart_ll_sclk_disable(uart_dev_t *hw)
*
* @return None.
*/
FORCE_INLINE_ATTR void uart_ll_set_sclk(uart_dev_t *hw, uart_sclk_t source_clk)
FORCE_INLINE_ATTR void uart_ll_set_sclk(uart_dev_t *hw, soc_module_clk_t source_clk)
{
switch (source_clk) {
default:
case UART_SCLK_APB:
hw->clk_conf.sclk_sel = 1;
break;
@@ -118,6 +118,9 @@ FORCE_INLINE_ATTR void uart_ll_set_sclk(uart_dev_t *hw, uart_sclk_t source_clk)
case UART_SCLK_XTAL:
hw->clk_conf.sclk_sel = 3;
break;
default:
// Invalid UART clock source
abort();
}
}
@@ -129,7 +132,7 @@ FORCE_INLINE_ATTR void uart_ll_set_sclk(uart_dev_t *hw, uart_sclk_t source_clk)
*
* @return None.
*/
FORCE_INLINE_ATTR void uart_ll_get_sclk(uart_dev_t *hw, uart_sclk_t *source_clk)
FORCE_INLINE_ATTR void uart_ll_get_sclk(uart_dev_t *hw, soc_module_clk_t *source_clk)
{
switch (hw->clk_conf.sclk_sel) {
default: