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rmt: support esp32s3

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This commit is contained in:
chenjianqiang
2020-08-13 16:55:56 +08:00
committed by morris
parent 99fae0f0b5
commit 9465af0066
12 changed files with 2305 additions and 2827 deletions
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32
components/driver/rmt.c
View File

@@ -24,6 +24,7 @@
#include "freertos/semphr.h"
#include "freertos/ringbuf.h"
#include "soc/soc_memory_layout.h"
#include "soc/rtc.h"
#include "hal/rmt_hal.h"
#include "hal/rmt_ll.h"
#include "esp_rom_gpio.h"
@@ -490,7 +491,11 @@ esp_err_t rmt_set_pin(rmt_channel_t channel, rmt_mode_t mode, gpio_num_t gpio_nu
esp_rom_gpio_connect_out_signal(gpio_num, RMT_SIG_OUT0_IDX + channel, 0, 0);
} else {
gpio_set_direction(gpio_num, GPIO_MODE_INPUT);
#if SOC_RMT_TX_RX_CHANNEL_INDEPENDENT
esp_rom_gpio_connect_in_signal(gpio_num, RMT_SIG_IN0_IDX + channel - RMT_LL_TX_CHAN_NUM, 0);
#else
esp_rom_gpio_connect_in_signal(gpio_num, RMT_SIG_IN0_IDX + channel, 0);
#endif
}
return ESP_OK;
}
@@ -520,14 +525,21 @@ static esp_err_t rmt_internal_config(rmt_dev_t *dev, const rmt_config_t *rmt_par
rmt_ll_reset_tx_pointer(dev, channel);
rmt_ll_reset_rx_pointer(dev, channel);
if (rmt_param->flags & RMT_CHANNEL_FLAGS_ALWAYS_ON) {
#ifdef SOC_RMT_SUPPORT_REF_TICK
// clock src: REF_CLK
rmt_source_clk_hz = REF_CLK_FREQ;
rmt_ll_set_counter_clock_src(dev, channel, RMT_BASECLK_REF);
#elif defined SOC_RMT_SUPPORT_XTAL_CLOCK
// clock src: XTAL_CLK
rmt_source_clk_hz = rtc_clk_xtal_freq_get() * 1000000;
rmt_ll_set_counter_clock_src(dev, channel, RMT_BASECLK_XTAL);
#endif
} else {
// clock src: APB_CLK
rmt_source_clk_hz = APB_CLK_FREQ;
rmt_ll_set_counter_clock_src(dev, channel, RMT_BASECLK_APB);
}
esp_rom_printf("rmt_source_clk_hz: %d\n", rmt_source_clk_hz);
rmt_ll_set_mem_blocks(dev, channel, mem_cnt);
rmt_ll_set_mem_owner(dev, channel, RMT_MEM_OWNER_HW);
RMT_EXIT_CRITICAL();
@@ -545,7 +557,7 @@ static esp_err_t rmt_internal_config(rmt_dev_t *dev, const rmt_config_t *rmt_par
}
#endif
/* always enable tx ping-pong */
rmt_ll_enable_tx_pingpong(dev, true);
rmt_ll_enable_tx_pingpong(dev, channel, true);
/*Set idle level */
rmt_ll_enable_tx_idle(dev, channel, rmt_param->tx_config.idle_output_en);
rmt_ll_set_tx_idle_level(dev, channel, idle_level);
@@ -1189,11 +1201,21 @@ esp_err_t rmt_get_counter_clock(rmt_channel_t channel, uint32_t *clock_hz)
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
RMT_CHECK(clock_hz, "parameter clock_hz can't be null", ESP_ERR_INVALID_ARG);
RMT_ENTER_CRITICAL();
if (rmt_ll_get_counter_clock_src(rmt_contex.hal.regs, channel) == RMT_BASECLK_REF) {
*clock_hz = rmt_hal_get_counter_clock(&rmt_contex.hal, channel, REF_CLK_FREQ);
} else {
*clock_hz = rmt_hal_get_counter_clock(&rmt_contex.hal, channel, APB_CLK_FREQ);
uint32_t rmt_source_clk_hz = 0;
if (rmt_ll_get_counter_clock_src(rmt_contex.hal.regs, channel) == RMT_BASECLK_APB) {
rmt_source_clk_hz = APB_CLK_FREQ;
}
#ifdef SOC_RMT_SUPPORT_REF_TICK
else if (rmt_ll_get_counter_clock_src(rmt_contex.hal.regs, channel) == RMT_BASECLK_REF) {
rmt_source_clk_hz = REF_CLK_FREQ;
}
#endif
#ifdef SOC_RMT_SUPPORT_XTAL_CLOCK
else if (rmt_ll_get_counter_clock_src(rmt_contex.hal.regs, channel) == RMT_BASECLK_XTAL) {
rmt_source_clk_hz = rtc_clk_xtal_freq_get() * 1000000;
}
#endif
*clock_hz = rmt_hal_get_counter_clock(&rmt_contex.hal, channel, rmt_source_clk_hz);
RMT_EXIT_CRITICAL();
return ESP_OK;
}

24
components/driver/test/test_rmt.c
View File

@@ -141,9 +141,17 @@ TEST_CASE("RMT miscellaneous functions", "[rmt]")
TEST_ESP_OK(rmt_get_clk_div(channel, &div_cnt));
TEST_ASSERT_EQUAL_UINT8(160, div_cnt);
#if SOC_RMT_SUPPORT_REF_TICK
TEST_ESP_OK(rmt_set_source_clk(channel, RMT_BASECLK_REF));
TEST_ESP_OK(rmt_get_source_clk(channel, &src_clk));
TEST_ASSERT_EQUAL_INT(RMT_BASECLK_REF, src_clk);
#endif
#if SOC_RMT_SUPPORT_XTAL_CLOCK
TEST_ESP_OK(rmt_set_source_clk(channel, RMT_BASECLK_XTAL));
TEST_ESP_OK(rmt_get_source_clk(channel, &src_clk));
TEST_ASSERT_EQUAL_INT(RMT_BASECLK_XTAL, src_clk);
#endif
TEST_ESP_OK(rmt_set_memory_owner(channel, RMT_MEM_OWNER_RX));
TEST_ESP_OK(rmt_get_memory_owner(channel, &owner));
@@ -205,7 +213,11 @@ static void do_nec_tx_rx(uint32_t flags)
uint32_t cmd = 0x20;
bool repeat = false;
int tx_channel = 0;
#ifdef CONFIG_IDF_TARGET_ESP32S3
int rx_channel = 4;
#else
int rx_channel = 1;
#endif
// test on different flags combinations
rmt_setup_testbench(tx_channel, rx_channel, flags);
@@ -302,7 +314,11 @@ TEST_CASE("RMT TX stop", "[rmt]")
uint32_t cmd = 0x20;
bool repeat = false;
int tx_channel = 0;
#ifdef CONFIG_IDF_TARGET_ESP32S3
int rx_channel = 4;
#else
int rx_channel = 1;
#endif
rmt_setup_testbench(tx_channel, rx_channel, 0);
@@ -361,7 +377,11 @@ TEST_CASE("RMT TX stop", "[rmt]")
TEST_CASE("RMT Ping-Pong operation", "[rmt]")
{
int tx_channel = 0;
#ifdef CONFIG_IDF_TARGET_ESP32S3
int rx_channel = 4;
#else
int rx_channel = 1;
#endif
rmt_item32_t frames[SOC_RMT_CHANNEL_MEM_WORDS * 2]; // send two block data using ping-pong
RingbufHandle_t rb = NULL;
uint32_t size = sizeof(frames) / sizeof(frames[0]);
@@ -478,7 +498,11 @@ TEST_CASE("RMT TX loop", "[rmt]")
uint32_t cmd = 0x20;
bool repeat = false;
int tx_channel = 0;
#ifdef CONFIG_IDF_TARGET_ESP32S3
int rx_channel = 4;
#else
int rx_channel = 1;
#endif
uint32_t count = 0;
rmt_setup_testbench(tx_channel, rx_channel, RMT_TESTBENCH_FLAGS_LOOP_ON);