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Merge branch 'bugfix/fix_uart_reset_issue_on_esp32c3_backport_v4.3' into 'release/v4.3'

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bugfix(uart): reset uart0 core before uart apb reset(backport v4.3)

See merge request espressif/esp-idf!14462
This commit is contained in:
Michael (XIAO Xufeng)
2021-07-30 06:27:22 +00:00
parent 9d4af47fa7 427fe1bcde
commit 95c572c0d2
5 changed files with 30 additions and 6 deletions
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15
components/driver/uart.c
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@@ -197,10 +197,19 @@ static void uart_module_enable(uart_port_t uart_num)
{
UART_ENTER_CRITICAL(&(uart_context[uart_num].spinlock));
if (uart_context[uart_num].hw_enabled != true) {
if (uart_num != CONFIG_ESP_CONSOLE_UART_NUM) {
periph_module_reset(uart_periph_signal[uart_num].module);
}
periph_module_enable(uart_periph_signal[uart_num].module);
if (uart_num != CONFIG_ESP_CONSOLE_UART_NUM) {
// Workaround for ESP32C3: enable core reset
// before enabling uart module clock
// to prevent uart output garbage value.
#if SOC_UART_REQUIRE_CORE_RESET
uart_hal_set_reset_core(&(uart_context[uart_num].hal), true);
periph_module_reset(uart_periph_signal[uart_num].module);
uart_hal_set_reset_core(&(uart_context[uart_num].hal), false);
#else
periph_module_reset(uart_periph_signal[uart_num].module);
#endif
}
uart_context[uart_num].hw_enabled = true;
}
UART_EXIT_CRITICAL(&(uart_context[uart_num].spinlock));