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Merge branch 'ci/tee_apm_pms_test_app' into 'master'
ci(hal): Add HAL/LL-based test app for the TEE and APM peripherals Closes IDF-8614, IDF-8615, IDF-9229, IDF-9230, IDF-10422, IDF-12646, IDF-12647, IDF-12648, IDF-12649, and IDF-12877 See merge request espressif/esp-idf!39873
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@@ -14,6 +14,8 @@
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#include "soc/hp_apm_struct.h"
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#include "soc/lp_apm_reg.h"
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#include "soc/lp_apm_struct.h"
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#include "soc/cpu_apm_reg.h"
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#include "soc/cpu_apm_struct.h"
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#include "soc/pcr_reg.h"
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#include "soc/interrupts.h"
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@@ -448,6 +450,195 @@ static inline int apm_ll_lp_apm_get_ctrl_intr_src(apm_ctrl_access_path_t path)
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return ETS_LP_APM_M0_INTR_SOURCE;
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}
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/**
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* @brief Enable/disable controller filter for specific path in CPU-APM
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*
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* @param path Access path
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* @param enable True to enable, false to disable
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*/
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static inline void apm_ll_cpu_apm_enable_ctrl_filter(apm_ctrl_access_path_t path, bool enable)
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{
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if (enable) {
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REG_SET_BIT(CPU_APM_FUNC_CTRL_REG, BIT(path));
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} else {
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REG_CLR_BIT(CPU_APM_FUNC_CTRL_REG, BIT(path));
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}
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}
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/**
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* @brief Enable/disable all controller filters in CPU-APM
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*
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* @param enable True to enable, false to disable
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*/
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static inline void apm_ll_cpu_apm_enable_ctrl_filter_all(bool enable)
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{
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REG_WRITE(CPU_APM_FUNC_CTRL_REG, enable ? UINT32_MAX : 0);
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}
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/**
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* @brief Enable/disable region filter in CPU-APM
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*
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* @param regn_num Region number
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* @param enable True to enable, false to disable
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*/
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static inline void apm_ll_cpu_apm_enable_region_filter(uint32_t regn_num, bool enable)
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{
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if (enable) {
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REG_SET_BIT(CPU_APM_REGION_FILTER_EN_REG, BIT(regn_num));
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} else {
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REG_CLR_BIT(CPU_APM_REGION_FILTER_EN_REG, BIT(regn_num));
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}
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}
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/**
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* @brief Set region start address in CPU-APM
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*
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* @param regn_num Region number
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* @param addr Start address
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*/
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static inline void apm_ll_cpu_apm_set_region_start_addr(uint32_t regn_num, uint32_t addr)
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{
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REG_WRITE(CPU_APM_REGION0_ADDR_START_REG + APM_REGION_ADDR_OFFSET * regn_num, addr);
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}
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/**
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* @brief Set region end address in CPU-APM
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*
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* @param regn_num Region number
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* @param addr End address
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*/
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static inline void apm_ll_cpu_apm_set_region_end_addr(uint32_t regn_num, uint32_t addr)
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{
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REG_WRITE(CPU_APM_REGION0_ADDR_END_REG + APM_REGION_ADDR_OFFSET * regn_num, addr);
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}
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/**
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* @brief Set security mode region attributes in CPU-APM
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*
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* @param regn_num Region number
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* @param mode Security mode
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* @param regn_pms Region PMS attributes
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*/
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static inline void apm_ll_cpu_apm_set_sec_mode_region_attr(uint32_t regn_num, apm_security_mode_t mode, uint32_t regn_pms)
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{
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uint32_t reg = CPU_APM_REGION0_ATTR_REG + APM_REGION_ATTR_OFFSET * regn_num;
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uint32_t val = REG_READ(reg);
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val &= ~APM_REGION_PMS_MASK(mode);
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val |= APM_REGION_PMS_FIELD(mode, regn_pms);
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REG_WRITE(reg, val);
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}
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/**
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* @brief Lock security mode region attributes in CPU-APM
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*
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* @param regn_num Region number
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*/
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static inline void apm_ll_cpu_apm_lock_sec_mode_region_attr(uint32_t regn_num)
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{
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REG_SET_BIT(CPU_APM_REGION0_ATTR_REG + APM_REGION_ATTR_OFFSET * regn_num, APM_REGION_LOCK_BIT);
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}
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/**
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* @brief Get exception data (regn, master, security mode) from CPU-APM
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*
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* @param path Access path
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* @return Exception data
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*/
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static inline uint32_t apm_ll_cpu_apm_get_excp_data(apm_ctrl_access_path_t path)
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{
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return REG_READ(CPU_APM_M0_EXCEPTION_INFO0_REG + APM_EXCP_INFO_OFFSET * path);
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}
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/**
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* @brief Get exception status from CPU-APM
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*
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* @param path Access path
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* @return Exception type
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*/
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static inline uint32_t apm_ll_cpu_apm_get_excp_type(apm_ctrl_access_path_t path)
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{
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return REG_READ(CPU_APM_M0_STATUS_REG + APM_EXCP_INFO_OFFSET * path);
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}
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/**
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* @brief Get exception address from CPU-APM
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*
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* @param path Access path
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* @return Exception address
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*/
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static inline uint32_t apm_ll_cpu_apm_get_excp_addr(apm_ctrl_access_path_t path)
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{
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return REG_READ(CPU_APM_M0_EXCEPTION_INFO1_REG + APM_EXCP_INFO_OFFSET * path);
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}
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/**
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* @brief Get exception information from CPU-APM
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*
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* @param path Access path
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* @param info Pointer to store exception information
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*/
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static inline void apm_ll_cpu_apm_get_excp_info(apm_ctrl_access_path_t path, apm_ctrl_exception_info_t *info)
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{
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cpu_apm_m0_exception_info0_reg_t reg;
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reg.val = apm_ll_cpu_apm_get_excp_data(path);
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info->regn = reg.apm_m0_exception_region;
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info->mode = reg.apm_m0_exception_mode;
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info->id = reg.apm_m0_exception_id;
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info->type = apm_ll_cpu_apm_get_excp_type(path);
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info->addr = apm_ll_cpu_apm_get_excp_addr(path);
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}
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/**
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* @brief Clear controller exception status in CPU-APM
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*
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* @param path Access path
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*/
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static inline void apm_ll_cpu_apm_clear_ctrl_excp_status(apm_ctrl_access_path_t path)
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{
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REG_SET_BIT(CPU_APM_M0_STATUS_CLR_REG + APM_EXCP_INFO_OFFSET * path, APM_EXCP_STATUS_CLR_BIT);
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}
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/**
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* @brief Enable/disable controller interrupt in CPU-APM
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*
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* @param path Access path
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* @param enable True to enable, false to disable
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*/
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static inline void apm_ll_cpu_apm_enable_ctrl_intr(apm_ctrl_access_path_t path, bool enable)
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{
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if (enable) {
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REG_SET_BIT(CPU_APM_INT_EN_REG, BIT(path));
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} else {
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REG_CLR_BIT(CPU_APM_INT_EN_REG, BIT(path));
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}
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}
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/**
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* @brief Enable/disable controller clock gating in CPU-APM
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*
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* @param enable True to enable, false to disable
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*/
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static inline void apm_ll_cpu_apm_enable_ctrl_clk_gating(bool enable)
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{
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if (enable) {
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REG_CLR_BIT(CPU_APM_CLOCK_GATE_REG, CPU_APM_CLK_EN);
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} else {
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REG_SET_BIT(CPU_APM_CLOCK_GATE_REG, CPU_APM_CLK_EN);
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}
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}
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/**
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* @brief Get controller interrupt source number from CPU-APM
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*
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* @param path Access path
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* @return Interrupt source number
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*/
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static inline int apm_ll_cpu_apm_get_ctrl_intr_src(apm_ctrl_access_path_t path)
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{
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return ETS_CPU_APM_M0_INTR_SOURCE + path;
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}
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/**
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* @brief Enable/disable APM reset event bypass
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*
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