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soc: Adds efuse hal
Replaced eFuse ROM funcs with hal layer
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@@ -1,12 +1,12 @@
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/*
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* SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "sdkconfig.h"
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#include "soc/soc.h"
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#include "soc/rtc.h"
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#include "soc/efuse_periph.h"
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#include "hal/efuse_hal.h"
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#include "soc/rtc_cntl_reg.h"
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#if CONFIG_IDF_TARGET_ESP32
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#include "soc/dport_reg.h"
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@@ -32,8 +32,7 @@ __attribute__((weak)) void bootloader_clock_configure(void)
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* document). For rev. 0, switch to 240 instead if it has been enabled
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* previously.
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*/
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uint32_t chip_ver_reg = REG_READ(EFUSE_BLK0_RDATA3_REG);
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if ((chip_ver_reg & EFUSE_RD_CHIP_VER_REV1_M) == 0 &&
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if (efuse_hal_get_chip_revision() == 0 &&
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DPORT_REG_GET_FIELD(DPORT_CPU_PER_CONF_REG, DPORT_CPUPERIOD_SEL) == DPORT_CPUPERIOD_SEL_240) {
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cpu_freq_mhz = 240;
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}
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