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refactor(brownout): correct names comments in the LL driver
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@@ -43,6 +43,7 @@
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#include "soc/pmu_reg.h"
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#include "hal/efuse_hal.h"
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#include "hal/regi2c_ctrl_ll.h"
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#include "hal/brownout_ll.h"
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static const char *TAG = "boot.esp32h2";
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@@ -97,8 +98,8 @@ static inline void bootloader_ana_reset_config(void)
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{
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//Enable super WDT reset.
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bootloader_ana_super_wdt_reset_config(true);
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//Enable BOD reset
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bootloader_ana_bod_reset_config(true);
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//Enable BOD reset (mode1)
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brownout_ll_ana_reset_enable(true);
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}
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esp_err_t bootloader_init(void)
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -13,17 +13,6 @@ void bootloader_ana_super_wdt_reset_config(bool enable)
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REG_CLR_BIT(LP_ANALOG_PERI_LP_ANA_FIB_ENABLE_REG, LP_ANALOG_PERI_LP_ANA_FIB_SUPER_WDT_RST);
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}
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void bootloader_ana_bod_reset_config(bool enable)
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{
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REG_CLR_BIT(LP_ANALOG_PERI_LP_ANA_FIB_ENABLE_REG, LP_ANALOG_PERI_LP_ANA_FIB_BOD_RST);
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if (enable) {
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REG_SET_BIT(LP_ANALOG_PERI_LP_ANA_BOD_MODE1_CNTL_REG, LP_ANALOG_PERI_LP_ANA_BOD_MODE1_RESET_ENA);
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} else {
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REG_CLR_BIT(LP_ANALOG_PERI_LP_ANA_BOD_MODE1_CNTL_REG, LP_ANALOG_PERI_LP_ANA_BOD_MODE1_RESET_ENA);
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}
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}
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//Not supported but common bootloader calls the function. Do nothing
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void bootloader_ana_clock_glitch_reset_config(bool enable)
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{
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