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Merge branch 'feature/esp32p4_lp_io_support' into 'master'
feat(lp_io): Add support for ESP32P4 Closes IDF-7815 See merge request espressif/esp-idf!25991
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@@ -23,8 +23,8 @@ extern "C" {
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#define RTCIO_LL_GPIO_NUM_OFFSET 7 // rtcio 0-7 correspond to gpio 7-14
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typedef enum {
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RTCIO_FUNC_RTC = 0x0, /*!< The pin controlled by RTC module. */
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RTCIO_FUNC_DIGITAL = 0x1, /*!< The pin controlled by DIGITAL module. */
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RTCIO_LL_FUNC_RTC = 0x0, /*!< The pin controlled by RTC module. */
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RTCIO_LL_FUNC_DIGITAL = 0x1, /*!< The pin controlled by DIGITAL module. */
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} rtcio_ll_func_t;
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/**
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@@ -37,12 +37,12 @@ typedef enum {
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*/
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static inline void rtcio_ll_function_select(int rtcio_num, rtcio_ll_func_t func)
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{
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if (func == RTCIO_FUNC_RTC) {
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if (func == RTCIO_LL_FUNC_RTC) {
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// 0: GPIO connected to digital GPIO module. 1: GPIO connected to analog RTC module.
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uint32_t sel_mask = HAL_FORCE_READ_U32_REG_FIELD(LP_AON.gpio_mux, gpio_mux_sel);
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sel_mask |= BIT(rtcio_num);
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HAL_FORCE_MODIFY_U32_REG_FIELD(LP_AON.gpio_mux, gpio_mux_sel, sel_mask);
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} else if (func == RTCIO_FUNC_DIGITAL) {
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} else if (func == RTCIO_LL_FUNC_DIGITAL) {
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// Clear the bit to use digital GPIO module
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uint32_t sel_mask = HAL_FORCE_READ_U32_REG_FIELD(LP_AON.gpio_mux, gpio_mux_sel);
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sel_mask &= ~BIT(rtcio_num);
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