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feat(esp_eth): added ioctl option to read/write PHY registers

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LAN87xx: Added extra delay after setting PHY speed
This commit is contained in:
Ondrej Kosta
2023-11-06 14:43:26 +01:00
parent 1d3e466c61
commit 99d4c1d13c
3 changed files with 46 additions and 3 deletions
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13
components/esp_eth/include/esp_eth_driver.h
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2019-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -121,6 +121,15 @@ typedef struct {
esp_err_t (*write_phy_reg)(esp_eth_handle_t eth_handle, uint32_t phy_addr, uint32_t phy_reg, uint32_t reg_value);
} esp_eth_config_t;
/**
* @brief Data structure to Read/Write PHY register via ioctl API
*
*/
typedef struct {
uint32_t reg_addr; /*!< PHY register address */
uint32_t *reg_value_p; /*!< Pointer to a memory where the register value is read/written */
} esp_eth_phy_reg_rw_data_t;
/**
* @brief Command list for ioctl API
*
@@ -139,6 +148,8 @@ typedef enum {
ETH_CMD_G_DUPLEX_MODE, /*!< Get Duplex mode */
ETH_CMD_S_DUPLEX_MODE, /*!< Set Duplex mode */
ETH_CMD_S_PHY_LOOPBACK, /*!< Set PHY loopback */
ETH_CMD_READ_PHY_REG, /*!< Read PHY register */
ETH_CMD_WRITE_PHY_REG, /*!< Write PHY register */
ETH_CMD_CUSTOM_MAC_CMDS = 0x0FFF, // Offset for start of MAC custom commands
ETH_CMD_CUSTOM_PHY_CMDS = 0x1FFF, // Offset for start of PHY custom commands