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feat(dedic_gpio): add support for esp32c5

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This commit is contained in:
Chen Jichang
2024-07-11 14:56:10 +08:00
parent 9ca974c8b3
commit 9b94afdd38
21 changed files with 161 additions and 80 deletions
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21
components/esp_driver_gpio/src/dedic_gpio.c
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@@ -10,22 +10,21 @@
#include <string.h>
#include <sys/lock.h>
#include "sdkconfig.h"
#include "esp_compiler.h"
#include "esp_heap_caps.h"
#include "esp_intr_alloc.h"
#include "esp_log.h"
#include "esp_check.h"
#include "esp_cpu.h"
#include "soc/soc_caps.h"
#include "soc/gpio_periph.h"
#include "soc/io_mux_reg.h"
#include "hal/dedic_gpio_cpu_ll.h"
#include "hal/gpio_hal.h"
#include "esp_private/gpio.h"
#include "esp_private/periph_ctrl.h"
#include "esp_rom_gpio.h"
#include "freertos/FreeRTOS.h"
#include "driver/dedic_gpio.h"
#include "soc/dedic_gpio_periph.h"
#if SOC_DEDIC_GPIO_ALLOW_REG_ACCESS
#include "soc/dedic_gpio_struct.h"
#endif
@@ -59,7 +58,7 @@ struct dedic_gpio_platform_t {
};
struct dedic_gpio_bundle_t {
uint32_t core_id; // CPU core ID, a GPIO bundle must be installed to a specific CPU core
int core_id; // CPU core ID, a GPIO bundle must be installed to a specific CPU core
uint32_t out_mask; // mask of output channels in the bank
uint32_t in_mask; // mask of input channels in the bank
uint32_t out_offset; // offset in the bank (seen from output channel)
@@ -104,7 +103,7 @@ err:
return ret;
}
static void dedic_gpio_break_platform(uint32_t core_id)
static void dedic_gpio_break_platform(int core_id)
{
if (s_platform[core_id]) {
// prevent breaking platform concurrently
@@ -151,7 +150,7 @@ static void dedic_gpio_default_isr(void *arg)
}
}
static esp_err_t dedic_gpio_install_interrupt(uint32_t core_id)
static esp_err_t dedic_gpio_install_interrupt(int core_id)
{
esp_err_t ret = ESP_OK;
if (!s_platform[core_id]->intr_hdl) {
@@ -172,7 +171,7 @@ err:
return ret;
}
static void dedic_gpio_uninstall_interrupt(uint32_t core_id)
static void dedic_gpio_uninstall_interrupt(int core_id)
{
if (s_platform[core_id]->intr_hdl) {
// prevent uninstall interrupt concurrently
@@ -187,7 +186,7 @@ static void dedic_gpio_uninstall_interrupt(uint32_t core_id)
}
}
static void dedic_gpio_set_interrupt(uint32_t core_id, uint32_t channel, dedic_gpio_intr_type_t type)
static void dedic_gpio_set_interrupt(int core_id, uint32_t channel, dedic_gpio_intr_type_t type)
{
dedic_gpio_ll_set_interrupt_type(s_platform[core_id]->dev, channel, type);
if (type != DEDIC_GPIO_INTR_NONE) {
@@ -269,13 +268,13 @@ esp_err_t dedic_gpio_new_bundle(const dedic_gpio_bundle_config_t *config, dedic_
// route dedicated GPIO channel signals to GPIO matrix
if (config->flags.in_en) {
for (size_t i = 0; i < config->array_size; i++) {
gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[config->gpio_array[i]], PIN_FUNC_GPIO);
gpio_func_sel(config->gpio_array[i], PIN_FUNC_GPIO);
esp_rom_gpio_connect_in_signal(config->gpio_array[i], dedic_gpio_periph_signals.cores[core_id].in_sig_per_channel[in_offset + i], config->flags.in_invert);
}
}
if (config->flags.out_en) {
for (size_t i = 0; i < config->array_size; i++) {
gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[config->gpio_array[i]], PIN_FUNC_GPIO);
gpio_func_sel(config->gpio_array[i], PIN_FUNC_GPIO);
esp_rom_gpio_connect_out_signal(config->gpio_array[i], dedic_gpio_periph_signals.cores[core_id].out_sig_per_channel[out_offset + i], config->flags.out_invert, false);
}
#if !SOC_DEDIC_GPIO_OUT_AUTO_ENABLE
@@ -314,7 +313,7 @@ esp_err_t dedic_gpio_del_bundle(dedic_gpio_bundle_handle_t bundle)
bool recycle_all = false;
ESP_GOTO_ON_FALSE(bundle, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
uint32_t core_id = esp_cpu_get_core_id();
int core_id = esp_cpu_get_core_id();
ESP_GOTO_ON_FALSE(core_id == bundle->core_id, ESP_FAIL, err, TAG, "del bundle on wrong CPU");
portENTER_CRITICAL(&s_platform[core_id]->spinlock);