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feat(hal/sha): use RCC atomic block to enable/reset the SHA peripheral

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This commit is contained in:
harshal.patil
2024-03-08 00:40:26 +05:30
parent 211a2a5477
commit 9cd10e196b
18 changed files with 375 additions and 55 deletions
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11
components/mbedtls/port/sha/parallel_engine/sha.c
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@@ -35,9 +35,11 @@
#include "esp_cpu.h"
#include "hal/sha_hal.h"
#include "hal/sha_ll.h"
#include "hal/sha_types.h"
#include "sha/sha_parallel_engine.h"
#include "soc/hwcrypto_periph.h"
#include "esp_private/esp_crypto_lock_internal.h"
#include "esp_private/periph_ctrl.h"
/*
@@ -151,7 +153,10 @@ static bool esp_sha_lock_engine_common(esp_sha_type sha_type, TickType_t ticks_t
if (engines_in_use == 0) {
/* Just locked first engine,
so enable SHA hardware */
periph_module_enable(PERIPH_SHA_MODULE);
SHA_RCC_ATOMIC() {
sha_ll_enable_bus_clock(true);
sha_ll_reset_register();
}
}
engines_in_use++;
@@ -174,7 +179,9 @@ void esp_sha_unlock_engine(esp_sha_type sha_type)
if (engines_in_use == 0) {
/* About to release last engine, so
disable SHA hardware */
periph_module_disable(PERIPH_SHA_MODULE);
SHA_RCC_ATOMIC() {
sha_ll_enable_bus_clock(false);
}
}
portEXIT_CRITICAL(&engines_in_use_lock);