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uart: fix misleading files for UART2
Includes: header files, ld files and clk.c ESP32-C3 only have UART0 and UART1.
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@@ -67,14 +67,14 @@
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#define DR_REG_APB_SARADC_BASE 0x60040000
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#define DR_REG_AES_XTS_BASE 0x600CC000
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#define REG_UHCI_BASE(i) (DR_REG_UHCI0_BASE - (i) * 0x8000)
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#define REG_UART_BASE( i ) (DR_REG_UART_BASE + (i) * 0x10000 + ( (i) > 1 ? 0xe000 : 0 ) )
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#define REG_UART_AHB_BASE(i) (0x60000000 + (i) * 0x10000 + ( (i) > 1 ? 0xe000 : 0 ) )
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#define UART_FIFO_AHB_REG(i) (REG_UART_AHB_BASE(i) + 0x0)
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#define REG_I2S_BASE( i ) (DR_REG_I2S_BASE + (i) * 0x1E000)
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#define REG_TIMG_BASE(i) (DR_REG_TIMERGROUP0_BASE + (i)*0x1000)
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#define REG_SPI_MEM_BASE(i) (DR_REG_SPI0_BASE - (i) * 0x1000)
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#define REG_I2C_BASE(i) (DR_REG_I2C_EXT_BASE + (i) * 0x14000 )
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#define REG_UHCI_BASE(i) (DR_REG_UHCI0_BASE - (i) * 0x8000)
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#define REG_UART_BASE(i) (DR_REG_UART_BASE + (i) * 0x10000)
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#define REG_UART_AHB_BASE(i) (0x60000000 + (i) * 0x10000)
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#define UART_FIFO_AHB_REG(i) (REG_UART_AHB_BASE(i) + 0x0)
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#define REG_I2S_BASE(i) (DR_REG_I2S_BASE + (i) * 0x1E000)
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#define REG_TIMG_BASE(i) (DR_REG_TIMERGROUP0_BASE + (i)*0x1000)
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#define REG_SPI_MEM_BASE(i) (DR_REG_SPI0_BASE - (i) * 0x1000)
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#define REG_I2C_BASE(i) (DR_REG_I2C_EXT_BASE + (i) * 0x14000 )
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//Registers Operation {{
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#define ETS_UNCACHED_ADDR(addr) (addr)
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