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feat(esp_hw_support): support top domain powered down during sleep for esp32c5
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@@ -81,7 +81,9 @@ static __attribute__((unused)) esp_err_t sleep_sys_periph_flash_spimem_retention
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return ESP_OK;
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}
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#if CONFIG_SPIRAM
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#if CONFIG_SPIRAM && CONFIG_IDF_TARGET_ESP32P4
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/* TODO: PM-205, In the ESP32C5, Flash and PSRAM use the same set of SPIMEM hardware, while in P4, Flash and PSRAM each have their own SPIMEM hardware.
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* It’s necessary to confirm whether the ESP32C5 can independently manage SPIMEM retention for Flash and PSRAM in software. */
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static __attribute__((unused)) esp_err_t sleep_sys_periph_psram_spimem_retention_init(void *arg)
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{
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esp_err_t err = sleep_retention_entries_create(psram_spimem_regs_retention, ARRAY_SIZE(psram_spimem_regs_retention), REGDMA_LINK_PRI_SYS_PERIPH_LOW, SLEEP_RETENTION_MODULE_SYS_PERIPH);
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@@ -142,7 +144,7 @@ static __attribute__((unused)) esp_err_t sleep_sys_periph_retention_init(void *a
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if(err) goto error;
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err = sleep_sys_periph_flash_spimem_retention_init(arg);
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if(err) goto error;
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#if CONFIG_SPIRAM
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#if CONFIG_SPIRAM && CONFIG_IDF_TARGET_ESP32P4
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err = sleep_sys_periph_psram_spimem_retention_init(arg);
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if(err) goto error;
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#endif
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