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https://github.com/espressif/esp-idf.git
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feat(esp_hw_support): support top domain powered down during sleep for esp32c5
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@@ -19,10 +19,10 @@ typedef enum periph_retention_module {
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SLEEP_RETENTION_MODULE_CLOCK_SYSTEM = 1,
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SLEEP_RETENTION_MODULE_CLOCK_MODEM = 2,
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/* digital peripheral module, which includes Interrupt Matrix, HP_SYSTEM,
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* TEE, APM, UART, IOMUX, SPIMEM, SysTimer, etc.. */
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* TEE, APM, IOMUX, SPIMEM, SysTimer, etc.. */
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SLEEP_RETENTION_MODULE_SYS_PERIPH = 3,
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/* Timer Group by target*/
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SLEEP_RETENTION_MODULE_TG0_WDT = 4,
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SLEEP_RETENTION_MODULE_TG0_WDT = 4,
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SLEEP_RETENTION_MODULE_TG1_WDT = 5,
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SLEEP_RETENTION_MODULE_TG0_TIMER = 6,
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SLEEP_RETENTION_MODULE_TG1_TIMER = 7,
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@@ -51,7 +51,7 @@ typedef enum periph_retention_module_bitmap {
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SLEEP_RETENTION_MODULE_BM_CLOCK_SYSTEM = BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM),
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SLEEP_RETENTION_MODULE_BM_CLOCK_MODEM = BIT(SLEEP_RETENTION_MODULE_CLOCK_MODEM),
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/* digital peripheral module, which includes Interrupt Matrix, HP_SYSTEM,
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* TEE, APM, UART, IOMUX, SPIMEM, SysTimer, etc.. */
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* TEE, APM, IOMUX, SPIMEM, SysTimer, etc.. */
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SLEEP_RETENTION_MODULE_BM_SYS_PERIPH = BIT(SLEEP_RETENTION_MODULE_SYS_PERIPH),
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/* Timer Group by target*/
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SLEEP_RETENTION_MODULE_BM_TASK_WDT = BIT(SLEEP_RETENTION_MODULE_TG0_WDT),
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@@ -77,22 +77,20 @@ typedef enum periph_retention_module_bitmap {
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SLEEP_RETENTION_MODULE_BM_ALL = (uint32_t)-1
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} periph_retention_module_bitmap_t;
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#define TOP_DOMAIN_PERIPHERALS_BM (SLEEP_RETENTION_MODULE_BM_CLOCK_SYSTEM \
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| SLEEP_RETENTION_MODULE_BM_CLOCK_MODEM \
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| SLEEP_RETENTION_MODULE_BM_SYS_PERIPH \
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| SLEEP_RETENTION_MODULE_BM_TASK_WDT \
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| SLEEP_RETENTION_MODULE_BM_INT_WDT \
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| SLEEP_RETENTION_MODULE_BM_TG0_TIMER \
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| SLEEP_RETENTION_MODULE_BM_TG1_TIMER \
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| SLEEP_RETENTION_MODULE_BM_GDMA_CH0 \
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| SLEEP_RETENTION_MODULE_BM_GDMA_CH1 \
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| SLEEP_RETENTION_MODULE_BM_GDMA_CH2 \
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| SLEEP_RETENTION_MODULE_BM_ADC \
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| SLEEP_RETENTION_MODULE_BM_I2C0 \
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| SLEEP_RETENTION_MODULE_BM_RMT0 \
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| SLEEP_RETENTION_MODULE_BM_UART0 \
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| SLEEP_RETENTION_MODULE_BM_UART1 \
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)
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#define TOP_DOMAIN_PERIPHERALS_BM ( SLEEP_RETENTION_MODULE_BM_SYS_PERIPH \
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| SLEEP_RETENTION_MODULE_BM_TASK_WDT \
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| SLEEP_RETENTION_MODULE_BM_INT_WDT \
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| SLEEP_RETENTION_MODULE_BM_TG0_TIMER \
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| SLEEP_RETENTION_MODULE_BM_TG1_TIMER \
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| SLEEP_RETENTION_MODULE_BM_GDMA_CH0 \
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| SLEEP_RETENTION_MODULE_BM_GDMA_CH1 \
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| SLEEP_RETENTION_MODULE_BM_GDMA_CH2 \
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| SLEEP_RETENTION_MODULE_BM_ADC \
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| SLEEP_RETENTION_MODULE_BM_I2C0 \
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| SLEEP_RETENTION_MODULE_BM_RMT0 \
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| SLEEP_RETENTION_MODULE_BM_UART0 \
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| SLEEP_RETENTION_MODULE_BM_UART1 \
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)
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#ifdef __cplusplus
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}
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@@ -47,16 +47,6 @@ extern const regdma_entries_config_t tee_apm_regs_retention[TEE_APM_RETENTION_LI
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#define TEE_APM_HIGH_PRI_RETENTION_LINK_LEN 1
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extern const regdma_entries_config_t tee_apm_highpri_regs_retention[TEE_APM_HIGH_PRI_RETENTION_LINK_LEN];
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/**
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* @brief Provide access to timer group configuration registers retention
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* context definition.
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*
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* This is an internal function of the sleep retention driver, and is not
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* useful for external use.
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*/
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#define TIMG_RETENTION_LINK_LEN 8
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extern const regdma_entries_config_t tg_regs_retention[TIMG_RETENTION_LINK_LEN];
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/**
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* @brief Provide access to IOMUX configuration registers retention
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* context definition.
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