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feat(esp_hw_support): support top domain powered down during sleep for esp32c5

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This commit is contained in:
Lou Tianhao
2024-06-24 15:29:18 +08:00
parent 50791931a1
commit a0da9ade35
25 changed files with 668 additions and 178 deletions
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25
components/soc/esp32p4/include/soc/retention_periph_defs.h
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@@ -58,19 +58,18 @@ typedef enum periph_retention_module_bitmap {
SLEEP_RETENTION_MODULE_BM_ALL = (uint32_t)-1
} periph_retention_module_bitmap_t;
#define TOP_DOMAIN_PERIPHERALS_BM (SLEEP_RETENTION_MODULE_BM_CLOCK_SYSTEM \
| SLEEP_RETENTION_MODULE_BM_SYS_PERIPH \
| SLEEP_RETENTION_MODULE_BM_TG0_WDT \
| SLEEP_RETENTION_MODULE_BM_TG1_WDT \
| SLEEP_RETENTION_MODULE_BM_TG0_TIMER \
| SLEEP_RETENTION_MODULE_BM_TG1_TIMER \
| SLEEP_RETENTION_MODULE_BM_UART0 \
| SLEEP_RETENTION_MODULE_BM_UART1 \
| SLEEP_RETENTION_MODULE_BM_UART2 \
| SLEEP_RETENTION_MODULE_BM_UART3 \
| SLEEP_RETENTION_MODULE_BM_UART4 \
| SLEEP_RETENTION_MODULE_BM_RMT0 \
)
#define TOP_DOMAIN_PERIPHERALS_BM ( SLEEP_RETENTION_MODULE_BM_SYS_PERIPH \
| SLEEP_RETENTION_MODULE_BM_TG0_WDT \
| SLEEP_RETENTION_MODULE_BM_TG1_WDT \
| SLEEP_RETENTION_MODULE_BM_TG0_TIMER \
| SLEEP_RETENTION_MODULE_BM_TG1_TIMER \
| SLEEP_RETENTION_MODULE_BM_UART0 \
| SLEEP_RETENTION_MODULE_BM_UART1 \
| SLEEP_RETENTION_MODULE_BM_UART2 \
| SLEEP_RETENTION_MODULE_BM_UART3 \
| SLEEP_RETENTION_MODULE_BM_UART4 \
| SLEEP_RETENTION_MODULE_BM_RMT0 \
)
#ifdef __cplusplus
}

10
components/soc/esp32p4/include/soc/system_periph_retention.h
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@@ -45,16 +45,6 @@ extern const regdma_entries_config_t l2_cache_regs_retention[L2_CACHE_RETENTION_
#define HP_SYSTEM_RETENTION_LINK_LEN 1
extern const regdma_entries_config_t hp_system_regs_retention[HP_SYSTEM_RETENTION_LINK_LEN];
/**
* @brief Provide access to timer group configuration registers retention
* context definition.
*
* This is an internal function of the sleep retention driver, and is not
* useful for external use.
*/
#define TIMG_RETENTION_LINK_LEN 8
extern const regdma_entries_config_t tg_regs_retention[TIMG_RETENTION_LINK_LEN];
/**
* @brief Provide access to IOMUX configuration registers retention
* context definition.