fix(uart): allow same pin for tx and rx in uart_set_pin

Closes https://github.com/espressif/esp-idf/issues/14787
This commit is contained in:
Song Ruo Jing
2025-01-08 21:25:26 +08:00
parent 33935c5607
commit a1ba653952
3 changed files with 80 additions and 28 deletions

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -398,8 +398,10 @@ esp_err_t uart_enable_tx_intr(uart_port_t uart_num, int enable, int thresh);
* RX pin binded to a GPIO through the GPIO matrix, whereas TX is binded
* to its GPIO through the IOMUX.
*
* @note Internal signal can be output to multiple GPIO pads.
* Only one GPIO pad can connect with input signal.
* @note It is possible to configure TX and RX to share the same IO (single wire mode),
* but please be aware of output conflict, which could damage the pad.
* Apply open-drain and pull-up to the pad ahead of time as a protection,
* or the upper layer protocol must guarantee no output from two ends at the same time.
*
* @param uart_num UART port number, the max port number is (UART_NUM_MAX -1).
* @param tx_io_num UART TX pin GPIO number.