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fix(spi): Correct REG_SPI_BASE(i) macro for all targets

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The existing formula can never match these registers.

Closes https://github.com/espressif/esp-idf/pull/12559
Closes https://github.com/espressif/esp-idf/pull/12562
This commit is contained in:
TD-er
2023-11-10 22:43:04 +01:00
committed by wanlei
parent a3cee541d3
commit a4bfa19ebd
16 changed files with 44 additions and 75 deletions
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1
components/soc/esp32c2/include/soc/soc.h
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@@ -30,6 +30,7 @@
#define UART_FIFO_AHB_REG(i) (REG_UART_AHB_BASE(i) + 0x0)
#define REG_TIMG_BASE(i) (DR_REG_TIMERGROUP0_BASE + (i)*0x1000)
#define REG_SPI_MEM_BASE(i) (DR_REG_SPI0_BASE - (i) * 0x1000)
#define REG_SPI_BASE(i) (((i)==2) ? (DR_REG_SPI2_BASE) : (0)) // only one GPSPI
#define REG_I2C_BASE(i) (DR_REG_I2C_EXT_BASE + (i) * 0x14000 )
//Registers Operation {{

3
components/soc/esp32c2/include/soc/spi_reg.h
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@@ -6,12 +6,11 @@
#ifndef _SOC_SPI_REG_H_
#define _SOC_SPI_REG_H_
#include "soc/soc.h"
#ifdef __cplusplus
extern "C" {
#endif
#include "soc/soc.h"
#define REG_SPI_BASE(i) (DR_REG_SPI2_BASE + (i - 2) * 0x1000)
#define SPI_CMD_REG(i) (REG_SPI_BASE(i) + 0x0)
/* SPI_USR : R/W/SC ;bitpos:[24] ;default: 1'b0 ; */

1
components/soc/esp32c2/ld/esp32c2.peripherals.ld
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@@ -16,7 +16,6 @@ PROVIDE ( LEDC = 0x60019000 );
PROVIDE ( TIMERG0 = 0x6001F000 );
PROVIDE ( SYSTIMER = 0x60023000 );
PROVIDE ( GPSPI2 = 0x60024000 );
PROVIDE ( GPSPI3 = 0x60025000 );
PROVIDE ( SYSCON = 0x60026000 );
PROVIDE ( APB_SARADC = 0x60040000 );
PROVIDE ( GDMA = 0x6003F000 );