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fix(spi): Correct REG_SPI_BASE(i) macro for all targets

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The existing formula can never match these registers.

Closes https://github.com/espressif/esp-idf/pull/12559
Closes https://github.com/espressif/esp-idf/pull/12562
This commit is contained in:
TD-er
2023-11-10 22:43:04 +01:00
committed by wanlei
parent a3cee541d3
commit a4bfa19ebd
16 changed files with 44 additions and 75 deletions
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4
components/soc/esp32p4/include/soc/soc.h
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@@ -22,10 +22,10 @@
#define REG_I2S_BASE(i) (DR_REG_I2S_BASE + (i) * 0x1000) // only one I2S on C6
#define REG_TIMG_BASE(i) (DR_REG_TIMERGROUP0_BASE + (i) * 0x1000) // TIMERG0 and TIMERG1
#define REG_SPI_MEM_BASE(i) (DR_REG_FLASH_SPI0_BASE + (i) * 0x1000) // SPIMEM0 and SPIMEM1
#define REG_SPI_BASE(i) (DR_REG_SPI2_BASE + (i) * 0x1000) // GPSPI2 and GPSPI3
#define REG_SPI_BASE(i) (((i)>=2) ? (DR_REG_SPI2_BASE + (i-2) * 0x1000) : (0)) // GPSPI2 and GPSPI3
#define REG_I2C_BASE(i) (DR_REG_I2C0_BASE + (i) * 0x1000)
#define REG_MCPWM_BASE(i) (DR_REG_MCPWM_BASE + (i) * 0x1000)
#define REG_TWAI_BASE(i) (DR_REG_TWAI0_BASE + (i) * 0x1000) // TWAI0 and TWAI1
#define REG_TWAI_BASE(i) (DR_REG_TWAI0_BASE + (i) * 0x1000) // TWAI0 and TWAI1
//Registers Operation {{
#define ETS_UNCACHED_ADDR(addr) (addr)