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fix(spi): Correct REG_SPI_BASE(i) macro for all targets
The existing formula can never match these registers. Closes https://github.com/espressif/esp-idf/pull/12559 Closes https://github.com/espressif/esp-idf/pull/12562
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2010-2022 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2010-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -27,14 +27,15 @@
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#define DR_REG_EXT_MEM_ENC 0x600CC000
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#define REG_UHCI_BASE(i) (DR_REG_UHCI0_BASE - (i) * 0x8000)
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#define REG_UART_BASE( i ) (DR_REG_UART_BASE + (i) * 0x10000 + ( (i) > 1 ? 0xe000 : 0 ) )
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#define REG_UART_AHB_BASE(i) (0x60000000 + (i) * 0x10000 + ( (i) > 1 ? 0xe000 : 0 ) )
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#define UART_FIFO_AHB_REG(i) (REG_UART_AHB_BASE(i) + 0x0)
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#define REG_I2S_BASE( i ) (DR_REG_I2S_BASE + (i) * 0x1E000)
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#define REG_TIMG_BASE(i) (DR_REG_TIMERGROUP0_BASE + (i)*0x1000)
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#define REG_UHCI_BASE(i) (DR_REG_UHCI0_BASE - (i) * 0x8000)
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#define REG_UART_BASE( i ) (DR_REG_UART_BASE + (i) * 0x10000 + ( (i) > 1 ? 0xe000 : 0 ) )
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#define REG_UART_AHB_BASE(i) (0x60000000 + (i) * 0x10000 + ( (i) > 1 ? 0xe000 : 0 ) )
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#define UART_FIFO_AHB_REG(i) (REG_UART_AHB_BASE(i) + 0x0)
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#define REG_I2S_BASE( i ) (DR_REG_I2S_BASE + (i) * 0x1E000)
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#define REG_TIMG_BASE(i) (DR_REG_TIMERGROUP0_BASE + (i)*0x1000)
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#define REG_SPI_MEM_BASE(i) (DR_REG_SPI0_BASE - (i) * 0x1000)
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#define REG_I2C_BASE(i) (DR_REG_I2C_EXT_BASE + (i) * 0x14000 )
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#define REG_SPI_BASE(i) (((i)>=2) ? (DR_REG_SPI2_BASE + (i-2) * 0x1000) : (0)) // GPSPI2 and GPSPI3
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#define REG_I2C_BASE(i) (DR_REG_I2C_EXT_BASE + (i) * 0x14000 )
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//Convenient way to replace the register ops when ulp riscv projects
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//consume this file
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@@ -38,7 +38,6 @@ PROVIDE ( SYSCON = 0x60026000 );
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PROVIDE ( I2C1 = 0x60027000 );
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PROVIDE ( SDMMC = 0x60028000 );
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PROVIDE ( TWAI = 0x6002B000 );
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PROVIDE ( GPSPI4 = 0x60037000 );
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PROVIDE ( GDMA = 0x6003F000 );
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PROVIDE ( UART2 = 0x6002E000 );
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PROVIDE ( DMA = 0x6003F000 );
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