mirror of
https://github.com/espressif/esp-idf.git
synced 2025-08-15 14:36:45 +00:00
feat(efuse): Adds efuse ADC calib data for ESP32-C61
This commit is contained in:
@@ -9,7 +9,7 @@
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#include <assert.h>
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#include "esp_efuse_table.h"
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// md5_digest_table 604cf47a9075de209e7b488c4c6a3cd6
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// md5_digest_table 29adf9ce1eb138af2755665a720d03d9
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// This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
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// If you want to change some fields, you need to change esp_efuse_table.csv file
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// then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
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@@ -159,8 +159,64 @@ static const esp_efuse_desc_t WR_DIS_SYS_DATA_PART1[] = {
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{EFUSE_BLK0, 21, 1}, // [] wr_dis of BLOCK2,
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};
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static const esp_efuse_desc_t WR_DIS_BLOCK_SYS_DATA1[] = {
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{EFUSE_BLK0, 21, 1}, // [] wr_dis of BLOCK_SYS_DATA1,
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static const esp_efuse_desc_t WR_DIS_OPTIONAL_UNIQUE_ID[] = {
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{EFUSE_BLK0, 21, 1}, // [] wr_dis of OPTIONAL_UNIQUE_ID,
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};
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static const esp_efuse_desc_t WR_DIS_TEMPERATURE_SENSOR[] = {
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{EFUSE_BLK0, 21, 1}, // [] wr_dis of TEMPERATURE_SENSOR,
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};
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static const esp_efuse_desc_t WR_DIS_OCODE[] = {
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{EFUSE_BLK0, 21, 1}, // [] wr_dis of OCODE,
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};
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static const esp_efuse_desc_t WR_DIS_ADC1_AVE_INIT_CODE_ATTEN0[] = {
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{EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_AVE_INIT_CODE_ATTEN0,
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};
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static const esp_efuse_desc_t WR_DIS_ADC1_AVE_INIT_CODE_ATTEN1[] = {
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{EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_AVE_INIT_CODE_ATTEN1,
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};
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static const esp_efuse_desc_t WR_DIS_ADC1_AVE_INIT_CODE_ATTEN2[] = {
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{EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_AVE_INIT_CODE_ATTEN2,
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};
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static const esp_efuse_desc_t WR_DIS_ADC1_AVE_INIT_CODE_ATTEN3[] = {
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{EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_AVE_INIT_CODE_ATTEN3,
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};
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static const esp_efuse_desc_t WR_DIS_ADC1_HI_DOUT_ATTEN0[] = {
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{EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_HI_DOUT_ATTEN0,
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};
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static const esp_efuse_desc_t WR_DIS_ADC1_HI_DOUT_ATTEN1[] = {
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{EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_HI_DOUT_ATTEN1,
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};
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static const esp_efuse_desc_t WR_DIS_ADC1_HI_DOUT_ATTEN2[] = {
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{EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_HI_DOUT_ATTEN2,
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};
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static const esp_efuse_desc_t WR_DIS_ADC1_HI_DOUT_ATTEN3[] = {
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{EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_HI_DOUT_ATTEN3,
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};
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static const esp_efuse_desc_t WR_DIS_ADC1_CH0_ATTEN0_INITCODE_DIFF[] = {
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{EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_CH0_ATTEN0_INITCODE_DIFF,
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};
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static const esp_efuse_desc_t WR_DIS_ADC1_CH1_ATTEN0_INITCODE_DIFF[] = {
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{EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_CH1_ATTEN0_INITCODE_DIFF,
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};
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static const esp_efuse_desc_t WR_DIS_ADC1_CH2_ATTEN0_INITCODE_DIFF[] = {
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{EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_CH2_ATTEN0_INITCODE_DIFF,
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};
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static const esp_efuse_desc_t WR_DIS_ADC1_CH3_ATTEN0_INITCODE_DIFF[] = {
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{EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_CH3_ATTEN0_INITCODE_DIFF,
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};
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static const esp_efuse_desc_t WR_DIS_BLOCK_USR_DATA[] = {
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@@ -360,7 +416,7 @@ static const esp_efuse_desc_t UART_PRINT_CONTROL[] = {
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};
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static const esp_efuse_desc_t FORCE_SEND_RESUME[] = {
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{EFUSE_BLK0, 103, 1}, // [] Represents whether ROM code is forced to send a resume commmand during SPI boot,
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{EFUSE_BLK0, 103, 1}, // [] Represents whether ROM code is forced to send a resume command during SPI boot,
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};
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static const esp_efuse_desc_t SECURE_VERSION[] = {
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@@ -404,8 +460,112 @@ static const esp_efuse_desc_t MAC[] = {
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{EFUSE_BLK1, 0, 8}, // [MAC_FACTORY] MAC address,
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};
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static const esp_efuse_desc_t BLOCK_SYS_DATA1[] = {
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{EFUSE_BLK2, 0, 256}, // [] System data part 1 (reserved),
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static const esp_efuse_desc_t WAFER_VERSION_MINOR[] = {
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{EFUSE_BLK1, 64, 4}, // [] Minor chip version,
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};
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static const esp_efuse_desc_t WAFER_VERSION_MAJOR[] = {
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{EFUSE_BLK1, 68, 2}, // [] Major chip version,
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};
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static const esp_efuse_desc_t DISABLE_WAFER_VERSION_MAJOR[] = {
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{EFUSE_BLK1, 70, 1}, // [] Disables check of wafer version major,
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};
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static const esp_efuse_desc_t DISABLE_BLK_VERSION_MAJOR[] = {
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{EFUSE_BLK1, 71, 1}, // [] Disables check of blk version major,
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};
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static const esp_efuse_desc_t BLK_VERSION_MINOR[] = {
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{EFUSE_BLK1, 72, 3}, // [] BLK_VERSION_MINOR of BLOCK2,
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};
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static const esp_efuse_desc_t BLK_VERSION_MAJOR[] = {
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{EFUSE_BLK1, 75, 2}, // [] BLK_VERSION_MAJOR of BLOCK2,
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};
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static const esp_efuse_desc_t FLASH_CAP[] = {
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{EFUSE_BLK1, 77, 3}, // [] Flash capacity,
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};
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static const esp_efuse_desc_t FLASH_VENDOR[] = {
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{EFUSE_BLK1, 80, 3}, // [] Flash vendor,
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};
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static const esp_efuse_desc_t PSRAM_CAP[] = {
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{EFUSE_BLK1, 83, 3}, // [] PSRAM capacity,
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};
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static const esp_efuse_desc_t PSRAM_VENDOR[] = {
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{EFUSE_BLK1, 86, 2}, // [] PSRAM vendor,
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};
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static const esp_efuse_desc_t TEMP[] = {
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{EFUSE_BLK1, 88, 2}, // [] Temperature,
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};
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static const esp_efuse_desc_t PKG_VERSION[] = {
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{EFUSE_BLK1, 90, 3}, // [] Package version,
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};
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static const esp_efuse_desc_t OPTIONAL_UNIQUE_ID[] = {
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{EFUSE_BLK2, 0, 128}, // [] Optional unique 128-bit ID,
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};
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static const esp_efuse_desc_t TEMPERATURE_SENSOR[] = {
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{EFUSE_BLK2, 128, 9}, // [] Temperature calibration data,
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};
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static const esp_efuse_desc_t OCODE[] = {
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{EFUSE_BLK2, 137, 8}, // [] ADC OCode calibration,
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};
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static const esp_efuse_desc_t ADC1_AVE_INIT_CODE_ATTEN0[] = {
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{EFUSE_BLK2, 145, 10}, // [] Average initcode of ADC1 atten0,
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};
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static const esp_efuse_desc_t ADC1_AVE_INIT_CODE_ATTEN1[] = {
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{EFUSE_BLK2, 155, 10}, // [] Average initcode of ADC1 atten1,
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};
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static const esp_efuse_desc_t ADC1_AVE_INIT_CODE_ATTEN2[] = {
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{EFUSE_BLK2, 165, 10}, // [] Average initcode of ADC1 atten2,
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};
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static const esp_efuse_desc_t ADC1_AVE_INIT_CODE_ATTEN3[] = {
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{EFUSE_BLK2, 175, 10}, // [] Average initcode of ADC1 atten3,
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};
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static const esp_efuse_desc_t ADC1_HI_DOUT_ATTEN0[] = {
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{EFUSE_BLK2, 185, 10}, // [] HI_DOUT of ADC1 atten0,
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};
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static const esp_efuse_desc_t ADC1_HI_DOUT_ATTEN1[] = {
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{EFUSE_BLK2, 195, 10}, // [] HI_DOUT of ADC1 atten1,
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};
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static const esp_efuse_desc_t ADC1_HI_DOUT_ATTEN2[] = {
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{EFUSE_BLK2, 205, 10}, // [] HI_DOUT of ADC1 atten2,
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};
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static const esp_efuse_desc_t ADC1_HI_DOUT_ATTEN3[] = {
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{EFUSE_BLK2, 215, 10}, // [] HI_DOUT of ADC1 atten3,
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};
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static const esp_efuse_desc_t ADC1_CH0_ATTEN0_INITCODE_DIFF[] = {
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{EFUSE_BLK2, 225, 4}, // [] Gap between ADC1 CH0 and average initcode,
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};
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static const esp_efuse_desc_t ADC1_CH1_ATTEN0_INITCODE_DIFF[] = {
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{EFUSE_BLK2, 229, 4}, // [] Gap between ADC1 CH1 and average initcode,
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};
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static const esp_efuse_desc_t ADC1_CH2_ATTEN0_INITCODE_DIFF[] = {
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{EFUSE_BLK2, 233, 4}, // [] Gap between ADC1 CH2 and average initcode,
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};
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static const esp_efuse_desc_t ADC1_CH3_ATTEN0_INITCODE_DIFF[] = {
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{EFUSE_BLK2, 237, 4}, // [] Gap between ADC1 CH3 and average initcode,
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};
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static const esp_efuse_desc_t USER_DATA[] = {
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@@ -628,8 +788,78 @@ const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SYS_DATA_PART1[] = {
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLOCK_SYS_DATA1[] = {
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&WR_DIS_BLOCK_SYS_DATA1[0], // [] wr_dis of BLOCK_SYS_DATA1
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const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_OPTIONAL_UNIQUE_ID[] = {
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&WR_DIS_OPTIONAL_UNIQUE_ID[0], // [] wr_dis of OPTIONAL_UNIQUE_ID
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_TEMPERATURE_SENSOR[] = {
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&WR_DIS_TEMPERATURE_SENSOR[0], // [] wr_dis of TEMPERATURE_SENSOR
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_OCODE[] = {
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&WR_DIS_OCODE[0], // [] wr_dis of OCODE
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ADC1_AVE_INIT_CODE_ATTEN0[] = {
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&WR_DIS_ADC1_AVE_INIT_CODE_ATTEN0[0], // [] wr_dis of ADC1_AVE_INIT_CODE_ATTEN0
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ADC1_AVE_INIT_CODE_ATTEN1[] = {
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&WR_DIS_ADC1_AVE_INIT_CODE_ATTEN1[0], // [] wr_dis of ADC1_AVE_INIT_CODE_ATTEN1
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ADC1_AVE_INIT_CODE_ATTEN2[] = {
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&WR_DIS_ADC1_AVE_INIT_CODE_ATTEN2[0], // [] wr_dis of ADC1_AVE_INIT_CODE_ATTEN2
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ADC1_AVE_INIT_CODE_ATTEN3[] = {
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&WR_DIS_ADC1_AVE_INIT_CODE_ATTEN3[0], // [] wr_dis of ADC1_AVE_INIT_CODE_ATTEN3
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ADC1_HI_DOUT_ATTEN0[] = {
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&WR_DIS_ADC1_HI_DOUT_ATTEN0[0], // [] wr_dis of ADC1_HI_DOUT_ATTEN0
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ADC1_HI_DOUT_ATTEN1[] = {
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&WR_DIS_ADC1_HI_DOUT_ATTEN1[0], // [] wr_dis of ADC1_HI_DOUT_ATTEN1
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ADC1_HI_DOUT_ATTEN2[] = {
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&WR_DIS_ADC1_HI_DOUT_ATTEN2[0], // [] wr_dis of ADC1_HI_DOUT_ATTEN2
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ADC1_HI_DOUT_ATTEN3[] = {
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&WR_DIS_ADC1_HI_DOUT_ATTEN3[0], // [] wr_dis of ADC1_HI_DOUT_ATTEN3
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ADC1_CH0_ATTEN0_INITCODE_DIFF[] = {
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&WR_DIS_ADC1_CH0_ATTEN0_INITCODE_DIFF[0], // [] wr_dis of ADC1_CH0_ATTEN0_INITCODE_DIFF
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ADC1_CH1_ATTEN0_INITCODE_DIFF[] = {
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&WR_DIS_ADC1_CH1_ATTEN0_INITCODE_DIFF[0], // [] wr_dis of ADC1_CH1_ATTEN0_INITCODE_DIFF
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ADC1_CH2_ATTEN0_INITCODE_DIFF[] = {
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&WR_DIS_ADC1_CH2_ATTEN0_INITCODE_DIFF[0], // [] wr_dis of ADC1_CH2_ATTEN0_INITCODE_DIFF
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ADC1_CH3_ATTEN0_INITCODE_DIFF[] = {
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&WR_DIS_ADC1_CH3_ATTEN0_INITCODE_DIFF[0], // [] wr_dis of ADC1_CH3_ATTEN0_INITCODE_DIFF
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NULL
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};
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@@ -879,7 +1109,7 @@ const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CONTROL[] = {
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};
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const esp_efuse_desc_t* ESP_EFUSE_FORCE_SEND_RESUME[] = {
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&FORCE_SEND_RESUME[0], // [] Represents whether ROM code is forced to send a resume commmand during SPI boot
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&FORCE_SEND_RESUME[0], // [] Represents whether ROM code is forced to send a resume command during SPI boot
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NULL
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};
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@@ -933,8 +1163,138 @@ const esp_efuse_desc_t* ESP_EFUSE_MAC[] = {
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_BLOCK_SYS_DATA1[] = {
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&BLOCK_SYS_DATA1[0], // [] System data part 1 (reserved)
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const esp_efuse_desc_t* ESP_EFUSE_WAFER_VERSION_MINOR[] = {
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&WAFER_VERSION_MINOR[0], // [] Minor chip version
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_WAFER_VERSION_MAJOR[] = {
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&WAFER_VERSION_MAJOR[0], // [] Major chip version
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_DISABLE_WAFER_VERSION_MAJOR[] = {
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&DISABLE_WAFER_VERSION_MAJOR[0], // [] Disables check of wafer version major
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_DISABLE_BLK_VERSION_MAJOR[] = {
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&DISABLE_BLK_VERSION_MAJOR[0], // [] Disables check of blk version major
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_BLK_VERSION_MINOR[] = {
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&BLK_VERSION_MINOR[0], // [] BLK_VERSION_MINOR of BLOCK2
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_BLK_VERSION_MAJOR[] = {
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&BLK_VERSION_MAJOR[0], // [] BLK_VERSION_MAJOR of BLOCK2
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_FLASH_CAP[] = {
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&FLASH_CAP[0], // [] Flash capacity
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_FLASH_VENDOR[] = {
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&FLASH_VENDOR[0], // [] Flash vendor
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_PSRAM_CAP[] = {
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&PSRAM_CAP[0], // [] PSRAM capacity
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_PSRAM_VENDOR[] = {
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&PSRAM_VENDOR[0], // [] PSRAM vendor
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_TEMP[] = {
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&TEMP[0], // [] Temperature
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_PKG_VERSION[] = {
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&PKG_VERSION[0], // [] Package version
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_OPTIONAL_UNIQUE_ID[] = {
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&OPTIONAL_UNIQUE_ID[0], // [] Optional unique 128-bit ID
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_TEMPERATURE_SENSOR[] = {
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&TEMPERATURE_SENSOR[0], // [] Temperature calibration data
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_OCODE[] = {
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&OCODE[0], // [] ADC OCode calibration
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_ADC1_AVE_INIT_CODE_ATTEN0[] = {
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&ADC1_AVE_INIT_CODE_ATTEN0[0], // [] Average initcode of ADC1 atten0
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_ADC1_AVE_INIT_CODE_ATTEN1[] = {
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&ADC1_AVE_INIT_CODE_ATTEN1[0], // [] Average initcode of ADC1 atten1
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NULL
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};
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const esp_efuse_desc_t* ESP_EFUSE_ADC1_AVE_INIT_CODE_ATTEN2[] = {
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&ADC1_AVE_INIT_CODE_ATTEN2[0], // [] Average initcode of ADC1 atten2
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_ADC1_AVE_INIT_CODE_ATTEN3[] = {
|
||||
&ADC1_AVE_INIT_CODE_ATTEN3[0], // [] Average initcode of ADC1 atten3
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_ADC1_HI_DOUT_ATTEN0[] = {
|
||||
&ADC1_HI_DOUT_ATTEN0[0], // [] HI_DOUT of ADC1 atten0
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_ADC1_HI_DOUT_ATTEN1[] = {
|
||||
&ADC1_HI_DOUT_ATTEN1[0], // [] HI_DOUT of ADC1 atten1
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_ADC1_HI_DOUT_ATTEN2[] = {
|
||||
&ADC1_HI_DOUT_ATTEN2[0], // [] HI_DOUT of ADC1 atten2
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_ADC1_HI_DOUT_ATTEN3[] = {
|
||||
&ADC1_HI_DOUT_ATTEN3[0], // [] HI_DOUT of ADC1 atten3
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_ADC1_CH0_ATTEN0_INITCODE_DIFF[] = {
|
||||
&ADC1_CH0_ATTEN0_INITCODE_DIFF[0], // [] Gap between ADC1 CH0 and average initcode
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_ADC1_CH1_ATTEN0_INITCODE_DIFF[] = {
|
||||
&ADC1_CH1_ATTEN0_INITCODE_DIFF[0], // [] Gap between ADC1 CH1 and average initcode
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_ADC1_CH2_ATTEN0_INITCODE_DIFF[] = {
|
||||
&ADC1_CH2_ATTEN0_INITCODE_DIFF[0], // [] Gap between ADC1 CH2 and average initcode
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_ADC1_CH3_ATTEN0_INITCODE_DIFF[] = {
|
||||
&ADC1_CH3_ATTEN0_INITCODE_DIFF[0], // [] Gap between ADC1 CH3 and average initcode
|
||||
NULL
|
||||
};
|
||||
|
||||
|
Reference in New Issue
Block a user