mirror of
https://github.com/espressif/esp-idf.git
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rtc_clk: Clean up some clock related enum and macro in soc/rtc.h, replace with new ones in
soc/clk_tree_defs.h
This commit is contained in:
@@ -9,6 +9,7 @@
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#include <stddef.h>
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#include <stdint.h>
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#include "soc/soc.h"
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#include "soc/clk_tree_defs.h"
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#ifdef __cplusplus
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extern "C" {
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@@ -49,10 +50,6 @@ extern "C" {
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#define RTC_SLOW_CLK_8MD256_CAL_TIMEOUT_THRES(cycles) (cycles << 12)
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#define RTC_SLOW_CLK_90K_CAL_TIMEOUT_THRES(cycles) (cycles << 10)
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#define RTC_SLOW_CLK_FREQ_90K 90000
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#define RTC_SLOW_CLK_FREQ_8MD256 (RTC_FAST_CLK_FREQ_APPROX / 256)
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#define RTC_SLOW_CLK_FREQ_32K 32768
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#define OTHER_BLOCKS_POWERUP 1
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#define OTHER_BLOCKS_WAIT 1
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@@ -145,60 +142,16 @@ typedef enum {
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*/
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#define RTC_XTAL_FREQ RTC_XTAL_FREQ_40M
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/**
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* @brief CPU frequency values
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*/
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typedef enum {
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RTC_CPU_FREQ_XTAL = 0, //!< Main XTAL frequency
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RTC_CPU_FREQ_80M = 1, //!< 80 MHz
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RTC_CPU_FREQ_160M = 2, //!< 160 MHz
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RTC_CPU_FREQ_240M = 3, //!< 240 MHz
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RTC_CPU_FREQ_2M = 4, //!< 2 MHz
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RTC_CPU_320M_80M = 5, //!< for test
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RTC_CPU_320M_160M = 6, //!< for test
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RTC_CPU_FREQ_XTAL_DIV2 = 7, //!< XTAL/2 after reset
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} rtc_cpu_freq_t;
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/**
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* @brief CPU clock source
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*/
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typedef enum {
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RTC_CPU_FREQ_SRC_XTAL, //!< XTAL
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RTC_CPU_FREQ_SRC_PLL, //!< PLL (480M or 320M)
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RTC_CPU_FREQ_SRC_8M, //!< Internal 8M RTC oscillator
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RTC_CPU_FREQ_SRC_APLL //!< APLL
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} rtc_cpu_freq_src_t;
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/**
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* @brief CPU clock configuration structure
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*/
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typedef struct rtc_cpu_freq_config_s {
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rtc_cpu_freq_src_t source; //!< The clock from which CPU clock is derived
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soc_cpu_clk_src_t source; //!< The clock from which CPU clock is derived
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uint32_t source_freq_mhz; //!< Source clock frequency
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uint32_t div; //!< Divider, freq_mhz = source_freq_mhz / div
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uint32_t freq_mhz; //!< CPU clock frequency
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} rtc_cpu_freq_config_t;
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/**
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* @brief RTC SLOW_CLK frequency values
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*/
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typedef enum {
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RTC_SLOW_FREQ_RTC = 0, //!< Internal 90 kHz RC oscillator
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RTC_SLOW_FREQ_32K_XTAL = 1, //!< External 32 kHz XTAL
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RTC_SLOW_FREQ_8MD256 = 2, //!< Internal 8 MHz RC oscillator, divided by 256
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} rtc_slow_freq_t;
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/**
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* @brief RTC FAST_CLK frequency values
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*/
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typedef enum {
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RTC_FAST_FREQ_XTALD4 = 0, //!< Main XTAL, divided by 4
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RTC_FAST_FREQ_8M = 1, //!< Internal 8 MHz RC oscillator
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} rtc_fast_freq_t;
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/* With the default value of CK8M_DFREQ, 8M clock frequency is 8.5 MHz +/- 7% */
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#define RTC_FAST_CLK_FREQ_APPROX 8500000
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#define RTC_CLK_CAL_FRACT 19 //!< Number of fractional bits in values returned by rtc_clk_cal
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#define RTC_VDDSDIO_TIEH_1_8V 0 //!< TIEH field value for 1.8V VDDSDIO
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@@ -218,14 +171,14 @@ typedef enum {
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* Initialization parameters for rtc_clk_init
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*/
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typedef struct {
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rtc_xtal_freq_t xtal_freq : 8; //!< Main XTAL frequency
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uint32_t cpu_freq_mhz : 10; //!< CPU frequency to set, in MHz
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rtc_fast_freq_t fast_freq : 1; //!< RTC_FAST_CLK frequency to set
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rtc_slow_freq_t slow_freq : 2; //!< RTC_SLOW_CLK frequency to set
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rtc_xtal_freq_t xtal_freq : 8; //!< Main XTAL frequency
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uint32_t cpu_freq_mhz : 10; //!< CPU frequency to set, in MHz
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soc_rtc_fast_clk_src_t fast_clk_src : 1; //!< RTC_FAST_CLK clock source to choose
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soc_rtc_slow_clk_src_t slow_clk_src : 2; //!< RTC_SLOW_CLK clock source to choose
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uint32_t clk_rtc_clk_div : 8;
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uint32_t clk_8m_clk_div : 3; //!< RTC 8M clock divider (division is by clk_8m_div+1, i.e. 0 means 8MHz frequency)
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uint32_t slow_clk_dcap : 8; //!< RTC 90k clock adjustment parameter (higher value leads to lower frequency)
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uint32_t clk_8m_dfreq : 8; //!< RTC 8m clock adjustment parameter (higher value leads to higher frequency)
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uint32_t clk_8m_clk_div : 3; //!< RTC 8M clock divider (division is by clk_8m_div+1, i.e. 0 means 8MHz frequency)
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uint32_t slow_clk_dcap : 8; //!< RTC 90k clock adjustment parameter (higher value leads to lower frequency)
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uint32_t clk_8m_dfreq : 8; //!< RTC 8m clock adjustment parameter (higher value leads to higher frequency)
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} rtc_clk_config_t;
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/**
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@@ -234,8 +187,8 @@ typedef struct {
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#define RTC_CLK_CONFIG_DEFAULT() { \
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.xtal_freq = RTC_XTAL_FREQ_40M, \
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.cpu_freq_mhz = 80, \
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.fast_freq = RTC_FAST_FREQ_8M, \
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.slow_freq = RTC_SLOW_FREQ_RTC, \
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.fast_clk_src = SOC_RTC_FAST_CLK_SRC_RC_FAST, \
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.slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW, \
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.clk_rtc_clk_div = 0, \
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.clk_8m_clk_div = 0, \
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.slow_clk_dcap = RTC_CNTL_SCK_DCAP_DEFAULT, \
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@@ -428,22 +381,22 @@ void rtc_clk_apll_coeff_set(uint32_t o_div, uint32_t sdm0, uint32_t sdm1, uint32
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/**
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* @brief Select source for RTC_SLOW_CLK
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* @param slow_freq clock source (one of rtc_slow_freq_t values)
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* @param slow_freq clock source (one of soc_rtc_slow_clk_src_t values)
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*/
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void rtc_clk_slow_freq_set(rtc_slow_freq_t slow_freq);
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void rtc_clk_slow_src_set(soc_rtc_slow_clk_src_t slow_freq);
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/**
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* @brief Get the RTC_SLOW_CLK source
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* @return currently selected clock source (one of rtc_slow_freq_t values)
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* @return currently selected clock source (one of soc_rtc_slow_clk_src_t values)
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*/
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rtc_slow_freq_t rtc_clk_slow_freq_get(void);
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soc_rtc_slow_clk_src_t rtc_clk_slow_src_get(void);
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/**
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* @brief Get the approximate frequency of RTC_SLOW_CLK, in Hz
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*
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* - if RTC_SLOW_FREQ_RTC is selected, returns ~90000
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* - if RTC_SLOW_FREQ_32K_XTAL is selected, returns 32768
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* - if RTC_SLOW_FREQ_8MD256 is selected, returns ~33000
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* - if SOC_RTC_SLOW_CLK_SRC_RC_SLOW is selected, returns ~90000
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* - if SOC_RTC_SLOW_CLK_SRC_XTAL32K is selected, returns 32768
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* - if SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 is selected, returns ~33000
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*
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* rtc_clk_cal function can be used to get more precise value by comparing
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* RTC_SLOW_CLK frequency to the frequency of main XTAL.
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@@ -454,15 +407,15 @@ uint32_t rtc_clk_slow_freq_get_hz(void);
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/**
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* @brief Select source for RTC_FAST_CLK
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* @param fast_freq clock source (one of rtc_fast_freq_t values)
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* @param fast_freq clock source (one of soc_rtc_fast_clk_src_t values)
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*/
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void rtc_clk_fast_freq_set(rtc_fast_freq_t fast_freq);
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void rtc_clk_fast_src_set(soc_rtc_fast_clk_src_t fast_freq);
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/**
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* @brief Get the RTC_FAST_CLK source
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* @return currently selected clock source (one of rtc_fast_freq_t values)
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* @return currently selected clock source (one of soc_rtc_fast_clk_src_t values)
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*/
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rtc_fast_freq_t rtc_clk_fast_freq_get(void);
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soc_rtc_fast_clk_src_t rtc_clk_fast_src_get(void);
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/**
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* @brief Get CPU frequency config for a given frequency
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