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Merge branch 'feature/mcpwm_support_c5' into 'master'

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feat(mcpwm): add driver support on esp32c5

Closes IDF-8709 and IDF-9101

See merge request espressif/esp-idf!29876
This commit is contained in:
morris
2024-05-29 10:27:35 +08:00
parent bfc1ecdb4b de5fb9f070
commit a7ffe77de0
24 changed files with 2065 additions and 356 deletions
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39
components/hal/esp32p4/include/hal/mcpwm_ll.h
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -15,6 +15,7 @@
#pragma once
#include <stdbool.h>
#include <stdio.h>
#include "soc/soc_caps.h"
#include "soc/mcpwm_struct.h"
#include "soc/clk_tree_defs.h"
@@ -22,7 +23,6 @@
#include "hal/mcpwm_types.h"
#include "hal/misc.h"
#include "hal/assert.h"
#include <stdio.h>
#include "soc/soc_etm_source.h"
#ifdef __cplusplus
@@ -133,7 +133,7 @@ static inline void mcpwm_ll_reset_register(int group_id)
#define mcpwm_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; mcpwm_ll_reset_register(__VA_ARGS__)
/**
* @brief Enable MCPWM module clock
* @brief Enable MCPWM function clock
*
* @param group_id Group ID
* @param en true to enable, false to disable
@@ -154,10 +154,10 @@ static inline void mcpwm_ll_group_enable_clock(int group_id, bool en)
/**
* @brief Set the clock source for MCPWM
*
* @param mcpwm Peripheral instance address
* @param group_id Group ID
* @param clk_src Clock source for the MCPWM peripheral
*/
static inline void mcpwm_ll_group_set_clock_source(mcpwm_dev_t *mcpwm, soc_module_clk_t clk_src)
static inline void mcpwm_ll_group_set_clock_source(int group_id, soc_module_clk_t clk_src)
{
uint8_t clk_id = 0;
switch (clk_src) {
@@ -174,9 +174,9 @@ static inline void mcpwm_ll_group_set_clock_source(mcpwm_dev_t *mcpwm, soc_modul
HAL_ASSERT(false);
break;
}
if (mcpwm == &MCPWM0) {
if (group_id == 0) {
HP_SYS_CLKRST.peri_clk_ctrl20.reg_mcpwm0_clk_src_sel = clk_id;
} else if (mcpwm == &MCPWM1) {
} else if (group_id == 1) {
HP_SYS_CLKRST.peri_clk_ctrl20.reg_mcpwm1_clk_src_sel = clk_id;
}
}
@@ -188,16 +188,16 @@ static inline void mcpwm_ll_group_set_clock_source(mcpwm_dev_t *mcpwm, soc_modul
/**
* @brief Set the MCPWM group clock prescale
*
* @param mcpwm Peripheral instance address
* @param group_id Group ID
* @param prescale Prescale value
*/
static inline void mcpwm_ll_group_set_clock_prescale(mcpwm_dev_t *mcpwm, int prescale)
static inline void mcpwm_ll_group_set_clock_prescale(int group_id, int prescale)
{
// group clock: PWM_clk = source_clock / (prescale)
HAL_ASSERT(prescale <= 256 && prescale > 0);
if (mcpwm == &MCPWM0) {
if (group_id == 0) {
HAL_FORCE_MODIFY_U32_REG_FIELD(HP_SYS_CLKRST.peri_clk_ctrl20, reg_mcpwm0_clk_div_num, prescale - 1);
} else if (mcpwm == &MCPWM1) {
} else if (group_id == 1) {
HAL_FORCE_MODIFY_U32_REG_FIELD(HP_SYS_CLKRST.peri_clk_ctrl20, reg_mcpwm1_clk_div_num, prescale - 1);
}
}
@@ -1738,23 +1738,6 @@ static inline void mcpwm_ll_etm_enable_evt_comparator_event(mcpwm_dev_t *mcpwm,
/////////////////////////////They might be removed in the next major release (ESP-IDF 6.0)//////////////////////////////
////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
static inline uint32_t mcpwm_ll_group_get_clock_prescale(mcpwm_dev_t *mcpwm)
{
if (mcpwm == &MCPWM0) {
return HAL_FORCE_READ_U32_REG_FIELD(HP_SYS_CLKRST.peri_clk_ctrl20, reg_mcpwm0_clk_div_num) + 1;
} else if (mcpwm == &MCPWM1) {
return HAL_FORCE_READ_U32_REG_FIELD(HP_SYS_CLKRST.peri_clk_ctrl20, reg_mcpwm1_clk_div_num) + 1;
}
return 0;
}
static inline uint32_t mcpwm_ll_timer_get_clock_prescale(mcpwm_dev_t *mcpwm, int timer_id)
{
mcpwm_timer_cfg0_reg_t cfg0;
cfg0.val = mcpwm->timer[timer_id].timer_cfg0.val;
return cfg0.timer_prescale + 1;
}
static inline uint32_t mcpwm_ll_timer_get_peak(mcpwm_dev_t *mcpwm, int timer_id, bool symmetric)
{
return HAL_FORCE_READ_U32_REG_FIELD(mcpwm->timer[timer_id].timer_cfg0, timer_period) + (symmetric ? 0 : 1);