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Merge branch 'feature/mcpwm_support_c5' into 'master'

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feat(mcpwm): add driver support on esp32c5

Closes IDF-8709 and IDF-9101

See merge request espressif/esp-idf!29876
This commit is contained in:
morris
2024-05-29 10:27:35 +08:00
parent bfc1ecdb4b de5fb9f070
commit a7ffe77de0
24 changed files with 2065 additions and 356 deletions
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27
components/hal/esp32s3/include/hal/mcpwm_ll.h
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@@ -108,7 +108,7 @@ static inline void mcpwm_ll_reset_register(int group_id)
#define mcpwm_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; mcpwm_ll_reset_register(__VA_ARGS__)
/**
* @brief Enable MCPWM module clock
* @brief Enable MCPWM function clock
*
* @note Not support to enable/disable the peripheral clock
*
@@ -124,25 +124,26 @@ static inline void mcpwm_ll_group_enable_clock(int group_id, bool en)
/**
* @brief Set the clock source for MCPWM
*
* @param mcpwm Peripheral instance address
* @param group_id Group ID
* @param clk_src Clock source for the MCPWM peripheral
*/
static inline void mcpwm_ll_group_set_clock_source(mcpwm_dev_t *mcpwm, mcpwm_timer_clock_source_t clk_src)
static inline void mcpwm_ll_group_set_clock_source(int group_id, mcpwm_timer_clock_source_t clk_src)
{
(void)mcpwm;
(void)group_id;
(void)clk_src;
}
/**
* @brief Set the MCPWM group clock prescale
*
* @param mcpwm Peripheral instance address
* @param group_id Group ID
* @param prescale Prescale value
*/
static inline void mcpwm_ll_group_set_clock_prescale(mcpwm_dev_t *mcpwm, int prescale)
static inline void mcpwm_ll_group_set_clock_prescale(int group_id, int prescale)
{
// group clock: PWM_clk = CLK_160M / (prescale)
HAL_ASSERT(prescale <= 256 && prescale > 0);
mcpwm_dev_t *mcpwm = MCPWM_LL_GET_HW(group_id);
HAL_FORCE_MODIFY_U32_REG_FIELD(mcpwm->clk_cfg, clk_prescale, prescale - 1);
}
@@ -216,7 +217,7 @@ static inline uint32_t mcpwm_ll_intr_get_status(mcpwm_dev_t *mcpwm)
* @brief Clear MCPWM interrupt status by mask
*
* @param mcpwm Peripheral instance address
* @param mask Interupt status mask
* @param mask Interrupt status mask
*/
__attribute__((always_inline))
static inline void mcpwm_ll_intr_clear_status(mcpwm_dev_t *mcpwm, uint32_t mask)
@@ -1628,18 +1629,6 @@ static inline void mcpwm_ll_capture_set_prescale(mcpwm_dev_t *mcpwm, int channel
/////////////////////////////They might be removed in the next major release (ESP-IDF 6.0)//////////////////////////////
////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
static inline uint32_t mcpwm_ll_group_get_clock_prescale(mcpwm_dev_t *mcpwm)
{
return HAL_FORCE_READ_U32_REG_FIELD(mcpwm->clk_cfg, clk_prescale) + 1;
}
static inline uint32_t mcpwm_ll_timer_get_clock_prescale(mcpwm_dev_t *mcpwm, int timer_id)
{
mcpwm_timer_cfg0_reg_t cfg0;
cfg0.val = mcpwm->timer[timer_id].timer_cfg0.val;
return cfg0.timer_prescale + 1;
}
static inline uint32_t mcpwm_ll_timer_get_peak(mcpwm_dev_t *mcpwm, int timer_id, bool symmetric)
{
return HAL_FORCE_READ_U32_REG_FIELD(mcpwm->timer[timer_id].timer_cfg0, timer_period) + (symmetric ? 0 : 1);