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https://github.com/espressif/esp-idf.git
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Merge branch 'feature/dac_driver_hal_support' into 'master'
dac: add hal for dac driver See merge request espressif/esp-idf!5591
This commit is contained in:
Wang Jia Lin
185
components/soc/esp32s2beta/include/hal/dac_ll.h
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185
components/soc/esp32s2beta/include/hal/dac_ll.h
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// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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/*******************************************************************************
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* NOTICE
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* The ll is not public api, don't use in application code.
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* See readme.md in soc/include/hal/readme.md
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******************************************************************************/
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#pragma once
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#include <stdlib.h>
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#include "soc/dac_periph.h"
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#include "hal/dac_types.h"
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/**
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* Power on dac module and start output voltage.
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*
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* @note Before powering up, make sure the DAC PAD is set to RTC PAD and floating status.
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* @param channel DAC channel num.
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*/
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static inline void dac_ll_power_on(dac_channel_t channel)
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{
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RTCIO.pad_dac[channel].dac_xpd_force = 1;
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RTCIO.pad_dac[channel].xpd_dac = 1;
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}
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/**
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* Power done dac module and stop output voltage.
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*
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* @param channel DAC channel num.
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*/
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static inline void dac_ll_power_down(dac_channel_t channel)
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{
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RTCIO.pad_dac[channel].dac_xpd_force = 0;
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RTCIO.pad_dac[channel].xpd_dac = 0;
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}
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/**
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* Output voltage with value (8 bit).
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*
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* @param channel DAC channel num.
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* @param value Output value. Value range: 0 ~ 255.
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* The corresponding range of voltage is 0v ~ VDD3P3_RTC.
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*/
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static inline void dac_ll_update_output_value(dac_channel_t channel, uint8_t value)
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{
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if (channel == DAC_CHANNEL_1) {
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SENS.sar_dac_ctrl2.dac_cw_en1 = 0;
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RTCIO.pad_dac[channel].dac = value;
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} else if (channel == DAC_CHANNEL_2) {
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SENS.sar_dac_ctrl2.dac_cw_en2 = 0;
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RTCIO.pad_dac[channel].dac = value;
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}
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}
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/************************************/
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/* DAC cosine wave generator API's */
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/************************************/
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/**
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* Enable cosine wave generator output.
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*/
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static inline void dac_ll_cw_generator_enable(void)
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{
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SENS.sar_dac_ctrl1.sw_tone_en = 1;
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}
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/**
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* Disable cosine wave generator output.
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*/
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static inline void dac_ll_cw_generator_disable(void)
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{
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SENS.sar_dac_ctrl1.sw_tone_en = 0;
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}
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/**
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* Enable the cosine wave generator of DAC channel.
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*
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* @param channel DAC channel num.
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* @param enable
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*/
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static inline void dac_ll_cw_set_channel(dac_channel_t channel, bool enable)
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{
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if (channel == DAC_CHANNEL_1) {
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SENS.sar_dac_ctrl2.dac_cw_en1 = enable;
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} else if (channel == DAC_CHANNEL_2) {
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SENS.sar_dac_ctrl2.dac_cw_en2 = enable;
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}
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}
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/**
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* Set frequency of cosine wave generator output.
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*
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* @note We know that CLK8M is about 8M, but don't know the actual value. so this freq have limited error.
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* @param freq_hz CW generator frequency. Range: 130(130Hz) ~ 55000(100KHz).
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*/
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static inline void dac_ll_cw_set_freq(uint32_t freq)
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{
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uint32_t sw_freq = freq * 0xFFFF / RTC_FAST_CLK_FREQ_APPROX;
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SENS.sar_dac_ctrl1.sw_fstep = (sw_freq > 0xFFFF) ? 0xFFFF : sw_freq;
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}
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/**
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* Set the amplitude of the cosine wave generator output.
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*
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* @param channel DAC channel num.
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* @param scale The multiple of the amplitude. The max amplitude is VDD3P3_RTC.
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*/
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static inline void dac_ll_cw_set_scale(dac_channel_t channel, dac_cw_scale_t scale)
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{
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if (channel == DAC_CHANNEL_1) {
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SENS.sar_dac_ctrl2.dac_scale1 = scale;
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} else if (channel == DAC_CHANNEL_2) {
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SENS.sar_dac_ctrl2.dac_scale2 = scale;
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}
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}
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/**
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* Set the phase of the cosine wave generator output.
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*
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* @param channel DAC channel num.
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* @param scale Phase value.
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*/
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static inline void dac_ll_cw_set_phase(dac_channel_t channel, dac_cw_phase_t phase)
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{
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if (channel == DAC_CHANNEL_1) {
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SENS.sar_dac_ctrl2.dac_inv1 = phase;
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} else if (channel == DAC_CHANNEL_2) {
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SENS.sar_dac_ctrl2.dac_inv2 = phase;
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}
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}
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/**
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* Set the voltage value of the DC component of the cosine wave generator output.
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*
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* @note The DC offset setting should be after phase setting.
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* @note Unreasonable settings can cause the signal to be oversaturated.
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* @param channel DAC channel num.
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* @param offset DC value. Range: -128 ~ 127.
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*/
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static inline void dac_ll_cw_set_dc_offset(dac_channel_t channel, int8_t offset)
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{
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if (channel == DAC_CHANNEL_1) {
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if (SENS.sar_dac_ctrl2.dac_inv1 == DAC_CW_PHASE_180) {
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offset = 0 - offset;
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}
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SENS.sar_dac_ctrl2.dac_dc1 = offset ? offset : (-128 - offset);
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} else if (channel == DAC_CHANNEL_2) {
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if (SENS.sar_dac_ctrl2.dac_inv2 == DAC_CW_PHASE_180) {
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offset = 0 - offset;
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}
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SENS.sar_dac_ctrl2.dac_dc2 = offset ? offset : (-128 - offset);
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}
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}
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/************************************/
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/* DAC DMA API's */
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/************************************/
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/**
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* Enable DAC output data from I2S DMA.
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* I2S_CLK connect to DAC_CLK, I2S_DATA_OUT connect to DAC_DATA.
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*/
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static inline void dac_ll_dma_enable(void)
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{
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SENS.sar_dac_ctrl1.dac_dig_force = 1;
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}
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/**
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* Disable DAC output data from I2S DMA.
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*/
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static inline void dac_ll_dma_disable(void)
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{
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SENS.sar_dac_ctrl1.dac_dig_force = 0;
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}
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22
components/soc/esp32s2beta/include/soc/dac_caps.h
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22
components/soc/esp32s2beta/include/soc/dac_caps.h
Normal file
@@ -0,0 +1,22 @@
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// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#ifndef _SOC_RTC_DAC_CAPS_H_
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#define _SOC_RTC_DAC_CAPS_H_
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#define SOC_DAC_PERIPH_NUM 2
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#define SOC_DAC_RESOLUTION 8 // DAC resolution ratio 8 bit
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#endif
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