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fix(adc): fix adc read zero after getting done signal on h2
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@@ -30,6 +30,7 @@ extern "C" {
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---------------------------------------------------------------*/
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#define ADC_LL_DATA_INVERT_DEFAULT(PERIPH_NUM) (1)
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#define ADC_LL_SAR_CLK_DIV_DEFAULT(PERIPH_NUM) (1)
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#define ADC_LL_DELAY_CYCLE_AFTER_DONE_SIGNAL (0)
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/*---------------------------------------------------------------
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DMA
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