fix(esp_hw_support): Fix incorrect PMA configuration for ESP32-P4

- As the PMA entry that made some memory regions cacheable was
assigned the highest priority, some intermediate inaccessible
memory regions bypassed protection.

- Added tests for the same

- Verified that even after changing the priority of the PMA entry,
a write operation at SOC_IRAM_LOW + 0x40 (a random RAM cached address)
still needs the same number (29) of CPU cycles.
This commit is contained in:
harshal.patil
2024-05-31 22:26:59 +05:30
parent 21258ad833
commit a8f509f481
5 changed files with 81 additions and 32 deletions

View File

@@ -656,6 +656,12 @@ CONFIGS_MEMPROT_FLASH_IDROM = [
pytest.param('memprot_esp32p4', marks=[pytest.mark.esp32p4])
]
CONFIGS_MEMPROT_INVALID_REGION_PROTECTION_USING_PMA = [
pytest.param('memprot_esp32c6', marks=[pytest.mark.esp32c6]),
pytest.param('memprot_esp32h2', marks=[pytest.mark.esp32h2]),
pytest.param('memprot_esp32p4', marks=[pytest.mark.esp32p4])
]
@pytest.mark.parametrize('config', CONFIGS_MEMPROT_DCACHE, indirect=True)
@pytest.mark.generic
@@ -919,6 +925,24 @@ def test_drom_reg_execute_violation(dut: PanicTestDut, test_func_name: str) -> N
dut.expect_cpu_reset()
@pytest.mark.parametrize('config', CONFIGS_MEMPROT_INVALID_REGION_PROTECTION_USING_PMA, indirect=True)
@pytest.mark.generic
def test_invalid_memory_region_write_violation(dut: PanicTestDut, test_func_name: str) -> None:
dut.run_test_func(test_func_name)
dut.expect_gme('Store access fault')
dut.expect_reg_dump(0)
dut.expect_cpu_reset()
@pytest.mark.parametrize('config', CONFIGS_MEMPROT_INVALID_REGION_PROTECTION_USING_PMA, indirect=True)
@pytest.mark.generic
def test_invalid_memory_region_execute_violation(dut: PanicTestDut, test_func_name: str) -> None:
dut.run_test_func(test_func_name)
dut.expect_gme('Instruction access fault')
dut.expect_reg_dump(0)
dut.expect_cpu_reset()
@pytest.mark.esp32
@pytest.mark.generic
@pytest.mark.parametrize('config', ['gdbstub_coredump'], indirect=True)