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change(soc): remove / move rom only mmu defs

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This commit is contained in:
Armando
2023-08-31 11:45:02 +08:00
parent 10c21f704c
commit a9e3f963c2
6 changed files with 137 additions and 170 deletions
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63
components/soc/esp32c2/include/soc/ext_mem_defs.h
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -43,42 +43,11 @@ extern "C" {
#define ADDRESS_IN_DRAM0(vaddr) ADDRESS_IN_BUS(DRAM0, vaddr)
#define ADDRESS_IN_DRAM0_CACHE(vaddr) ADDRESS_IN_BUS(DRAM0_CACHE, vaddr)
#define BUS_IRAM0_CACHE_SIZE BUS_SIZE(IRAM0_CACHE)
#define BUS_DRAM0_CACHE_SIZE BUS_SIZE(DRAM0_CACHE)
#define CACHE_IBUS 0
#define CACHE_IBUS_MMU_START 0
#define CACHE_IBUS_MMU_END 0x100
#define CACHE_DBUS 1
#define CACHE_DBUS_MMU_START 0
#define CACHE_DBUS_MMU_END 0x100
//TODO, remove these cache function dependencies
#define CACHE_IROM_MMU_START 0
#define CACHE_IROM_MMU_END Cache_Get_IROM_MMU_End()
#define CACHE_IROM_MMU_SIZE (CACHE_IROM_MMU_END - CACHE_IROM_MMU_START)
#define CACHE_DROM_MMU_START CACHE_IROM_MMU_END
#define CACHE_DROM_MMU_END Cache_Get_DROM_MMU_End()
#define CACHE_DROM_MMU_SIZE (CACHE_DROM_MMU_END - CACHE_DROM_MMU_START)
#define CACHE_DROM_MMU_MAX_END 0x100
#define ICACHE_MMU_SIZE 0x100
#define DCACHE_MMU_SIZE 0x100
#define MMU_BUS_START(i) 0
#define MMU_BUS_SIZE(i) 0x100
#define MMU_INVALID BIT(6)
#define MMU_VALID 0
#define MMU_TYPE 0
#define MMU_ACCESS_FLASH 0
#define CACHE_MAX_SYNC_NUM 0x400000
#define CACHE_MAX_LOCK_NUM 0x8000
/**
* MMU entry valid bit mask for mapping value. For an entry:
* valid bit + value bits
@@ -168,6 +137,36 @@ extern "C" {
_Static_assert(SOC_MMU_IRAM0_LINEAR_ADDRESS_LOW == SOC_MMU_DRAM0_LINEAR_ADDRESS_LOW, "IRAM0 and DRAM0 linear address should be same");
/**
* ROM flash mmap driver needs below definitions
*/
#define BUS_IRAM0_CACHE_SIZE BUS_SIZE(IRAM0_CACHE)
#define BUS_DRAM0_CACHE_SIZE BUS_SIZE(DRAM0_CACHE)
#define CACHE_IBUS 0
#define CACHE_IBUS_MMU_START 0
#define CACHE_IBUS_MMU_END 0x100
#define CACHE_DBUS 1
#define CACHE_DBUS_MMU_START 0
#define CACHE_DBUS_MMU_END 0x100
#define CACHE_IROM_MMU_START 0
#define CACHE_IROM_MMU_END Cache_Get_IROM_MMU_End()
#define CACHE_IROM_MMU_SIZE (CACHE_IROM_MMU_END - CACHE_IROM_MMU_START)
#define CACHE_DROM_MMU_START CACHE_IROM_MMU_END
#define CACHE_DROM_MMU_END Cache_Get_DROM_MMU_End()
#define CACHE_DROM_MMU_SIZE (CACHE_DROM_MMU_END - CACHE_DROM_MMU_START)
#define CACHE_DROM_MMU_MAX_END 0x100
#define ICACHE_MMU_SIZE 0x100
#define DCACHE_MMU_SIZE 0x100
#define MMU_BUS_START(i) 0
#define MMU_BUS_SIZE(i) 0x100
#ifdef __cplusplus
}
#endif