mirror of
https://github.com/espressif/esp-idf.git
synced 2025-08-22 09:06:27 +00:00
feat(cpu_region_protect): Enable basic memory protection for SPIRAM
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@@ -44,6 +44,10 @@ void test_rtc_slow_reg2_execute_violation(void);
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void test_irom_reg_write_violation(void);
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void test_spiram_xip_irom_alignment_reg_execute_violation(void);
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void test_spiram_xip_drom_alignment_reg_execute_violation(void);
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void test_drom_reg_write_violation(void);
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void test_drom_reg_execute_violation(void);
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -18,6 +18,9 @@
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#include "test_panic.h"
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#include "test_memprot.h"
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#include "sdkconfig.h"
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#include "soc/soc_caps.h"
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/* Test Utility Functions */
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#define BOOT_CMD_MAX_LEN (128)
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@@ -172,6 +175,13 @@ void app_main(void)
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HANDLE_TEST(test_name, test_irom_reg_write_violation);
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HANDLE_TEST(test_name, test_drom_reg_write_violation);
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HANDLE_TEST(test_name, test_drom_reg_execute_violation);
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#if CONFIG_SPIRAM_FETCH_INSTRUCTIONS && SOC_MMU_DI_VADDR_SHARED
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HANDLE_TEST(test_name, test_spiram_xip_irom_alignment_reg_execute_violation);
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#endif
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#endif
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#if CONFIG_SPIRAM_RODATA && !CONFIG_IDF_TARGET_ESP32S2
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HANDLE_TEST(test_name, test_spiram_xip_drom_alignment_reg_execute_violation);
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#endif
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#ifdef CONFIG_SOC_CPU_HAS_PMA
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -13,6 +13,7 @@
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#include "esp_system.h"
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#include "esp_log.h"
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#include "soc/soc.h"
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#include "soc/soc_caps.h"
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#include "test_memprot.h"
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#include "sdkconfig.h"
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@@ -24,6 +25,8 @@ extern int _iram_start;
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extern int _iram_text_start;
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extern int _iram_text_end;
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#define ALIGN_UP_TO_MMU_PAGE_SIZE(addr) (((addr) + (SOC_MMU_PAGE_SIZE) - 1) & ~((SOC_MMU_PAGE_SIZE) - 1))
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/* NOTE: Naming conventions for RTC_FAST_MEM are
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* different for ESP32-C3 and other RISC-V targets
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*/
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@@ -245,8 +248,37 @@ void test_drom_reg_execute_violation(void)
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func_ptr = (void(*)(void))foo_buf;
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func_ptr();
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}
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// Check if the memory alignment gaps added to the heap are correctly configured
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#if CONFIG_SPIRAM_FETCH_INSTRUCTIONS && SOC_MMU_DI_VADDR_SHARED
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void test_spiram_xip_irom_alignment_reg_execute_violation(void)
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{
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extern int _instruction_reserved_end;
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if (ALIGN_UP_TO_MMU_PAGE_SIZE((uint32_t)(&_instruction_reserved_end)) - (uint32_t)(&_instruction_reserved_end) >= 4) {
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void (*test_addr)(void) = (void(*)(void))((uint32_t)(&_instruction_reserved_end + 0x4));
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printf("SPIRAM (IROM): Execute operation | Address: %p\n", test_addr);
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test_addr();
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} else {
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printf("SPIRAM (IROM): IROM alignment gap not added into heap\n");
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}
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}
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#endif /* CONFIG_SPIRAM_FETCH_INSTRUCTIONS && SOC_MMU_DI_VADDR_SHARED */
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#endif
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#if CONFIG_SPIRAM_RODATA && !CONFIG_IDF_TARGET_ESP32S2
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void test_spiram_xip_drom_alignment_reg_execute_violation(void)
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{
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extern int _rodata_reserved_end;
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if (ALIGN_UP_TO_MMU_PAGE_SIZE((uint32_t)(&_rodata_reserved_end)) - (uint32_t)(&_rodata_reserved_end) >= 4) {
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void (*test_addr)(void) = (void(*)(void))((uint32_t)(&_rodata_reserved_end + 0x4));
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printf("SPIRAM (DROM): Execute operation | Address: %p\n", test_addr);
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test_addr();
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} else {
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printf("SPIRAM (DROM): DROM alignment gap not added into heap\n");
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}
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}
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#endif /* CONFIG_SPIRAM_RODATA && !CONFIG_IDF_TARGET_ESP32S2 */
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#ifdef CONFIG_SOC_CPU_HAS_PMA
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void test_invalid_memory_region_write_violation(void)
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{
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@@ -163,7 +163,8 @@ def common_test(
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dut.revert_log_level()
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return # don't expect "Rebooting" output below
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# We will only perform comparisons for ELF files, as we are not introducing any new fields to the binary file format.
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# We will only perform comparisons for ELF files,
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# as we are not introducing any new fields to the binary file format.
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if 'bin' in config:
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expected_coredump = None
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@@ -719,6 +720,29 @@ CONFIGS_MEMPROT_FLASH_IDROM = list(
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)
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)
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CONFIGS_MEMPROT_SPIRAM_XIP_IROM_ALIGNMENT_HEAP = list(
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itertools.chain(
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itertools.product(
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['memprot_spiram_xip_esp32c5', 'memprot_spiram_xip_esp32c61', 'memprot_spiram_xip_esp32p4'],
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['esp32c5', 'esp32c61', 'esp32p4'],
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)
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)
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)
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CONFIGS_MEMPROT_SPIRAM_XIP_DROM_ALIGNMENT_HEAP = list(
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itertools.chain(
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itertools.product(
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[
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'memprot_spiram_xip_esp32s3',
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'memprot_spiram_xip_esp32c5',
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'memprot_spiram_xip_esp32c61',
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'memprot_spiram_xip_esp32p4',
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],
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['esp32s3', 'esp32c5', 'esp32c61', 'esp32p4'],
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)
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)
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)
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CONFIGS_MEMPROT_INVALID_REGION_PROTECTION_USING_PMA = list(
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itertools.chain(
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itertools.product(
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@@ -1000,6 +1024,33 @@ def test_drom_reg_execute_violation(dut: PanicTestDut, test_func_name: str) -> N
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dut.expect_cpu_reset()
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@pytest.mark.generic
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@idf_parametrize('config, target', CONFIGS_MEMPROT_SPIRAM_XIP_IROM_ALIGNMENT_HEAP, indirect=['config', 'target'])
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def test_spiram_xip_irom_alignment_reg_execute_violation(dut: PanicTestDut, test_func_name: str) -> None:
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dut.run_test_func(test_func_name)
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try:
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dut.expect_gme('Instruction access fault')
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except Exception:
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dut.expect_exact('SPIRAM (IROM): IROM alignment gap not added into heap')
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dut.expect_reg_dump(0)
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dut.expect_cpu_reset()
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@pytest.mark.generic
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@idf_parametrize('config, target', CONFIGS_MEMPROT_SPIRAM_XIP_DROM_ALIGNMENT_HEAP, indirect=['config', 'target'])
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def test_spiram_xip_drom_alignment_reg_execute_violation(dut: PanicTestDut, test_func_name: str) -> None:
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dut.run_test_func(test_func_name)
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try:
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if dut.target == 'esp32s3':
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dut.expect_gme('InstructionFetchError')
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else:
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dut.expect_gme('Instruction access fault')
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except Exception:
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dut.expect_exact('SPIRAM (DROM): DROM alignment gap not added into heap')
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dut.expect_reg_dump(0)
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dut.expect_cpu_reset()
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@pytest.mark.generic
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@idf_parametrize('config, target', CONFIGS_MEMPROT_INVALID_REGION_PROTECTION_USING_PMA, indirect=['config', 'target'])
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def test_invalid_memory_region_write_violation(dut: PanicTestDut, test_func_name: str) -> None:
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@@ -6,3 +6,7 @@ CONFIG_ESP_SYSTEM_PMP_IDRAM_SPLIT=y
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# Enable memprot test
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CONFIG_TEST_MEMPROT=y
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# Enable SPIRAM to check the alignment gap's memory protection
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CONFIG_SPIRAM=y
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CONFIG_SPIRAM_USE_CAPS_ALLOC=y
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@@ -6,3 +6,7 @@ CONFIG_ESP_SYSTEM_PMP_IDRAM_SPLIT=y
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# Enable memprot test
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CONFIG_TEST_MEMPROT=y
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# Enable SPIRAM to check the alignment gap's memory protection
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CONFIG_SPIRAM=y
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CONFIG_SPIRAM_USE_CAPS_ALLOC=y
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@@ -6,3 +6,7 @@ CONFIG_ESP_SYSTEM_PMP_IDRAM_SPLIT=y
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# Enable memprot test
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CONFIG_TEST_MEMPROT=y
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# Enable SPIRAM to check the alignment gap's memory protection
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CONFIG_SPIRAM=y
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CONFIG_SPIRAM_USE_CAPS_ALLOC=y
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@@ -0,0 +1,13 @@
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# Restricting to ESP32C5
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CONFIG_IDF_TARGET="esp32c5"
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# Enabling memory protection
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CONFIG_ESP_SYSTEM_PMP_IDRAM_SPLIT=y
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# Enable memprot test
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CONFIG_TEST_MEMPROT=y
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# Enable SPIRAM to check the alignment gap's memory protection
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CONFIG_SPIRAM=y
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CONFIG_SPIRAM_USE_CAPS_ALLOC=y
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CONFIG_SPIRAM_XIP_FROM_PSRAM=y
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@@ -0,0 +1,13 @@
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# Restricting to ESP32C61
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CONFIG_IDF_TARGET="esp32c61"
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# Enabling memory protection
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CONFIG_ESP_SYSTEM_PMP_IDRAM_SPLIT=y
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# Enable memprot test
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CONFIG_TEST_MEMPROT=y
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# Enable SPIRAM to check the alignment gap's memory protection
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CONFIG_SPIRAM=y
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CONFIG_SPIRAM_USE_CAPS_ALLOC=y
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CONFIG_SPIRAM_XIP_FROM_PSRAM=y
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@@ -0,0 +1,13 @@
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# Restricting to ESP32P4
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CONFIG_IDF_TARGET="esp32p4"
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# Enabling memory protection
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CONFIG_ESP_SYSTEM_PMP_IDRAM_SPLIT=y
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# Enable memprot test
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CONFIG_TEST_MEMPROT=y
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# Enable SPIRAM to check the alignment gap's memory protection
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CONFIG_SPIRAM=y
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CONFIG_SPIRAM_USE_CAPS_ALLOC=y
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CONFIG_SPIRAM_XIP_FROM_PSRAM=y
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@@ -0,0 +1,17 @@
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# Restricting to ESP32S3
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CONFIG_IDF_TARGET="esp32s3"
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# Enabling memory protection
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CONFIG_ESP_SYSTEM_MEMPROT_FEATURE=y
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CONFIG_ESP_SYSTEM_MEMPROT_FEATURE_LOCK=y
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# Enabling DCACHE
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CONFIG_ESP32S3_DATA_CACHE_16KB=y
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# Enable memprot test
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CONFIG_TEST_MEMPROT=y
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# Enable SPIRAM to check the alignment gap's memory protection
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CONFIG_SPIRAM=y
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CONFIG_SPIRAM_USE_CAPS_ALLOC=y
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CONFIG_SPIRAM_XIP_FROM_PSRAM=y
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