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fix(esp_hw_support): fix pmu analog parameter configuration missing
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@@ -349,7 +349,7 @@ typedef struct {
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}, \
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.lp_sys[PMU_MODE_LP_SLEEP] = { \
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.analog = { \
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.drv_b = PMU_LP_DRVB_DEEPSLEEP, \
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.drv_b = PMU_LP_DRVB_LIGHTSLEEP, \
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.pd_cur = PMU_PD_CUR_SLEEP_DEFAULT, \
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.bias_sleep = PMU_BIASSLP_SLEEP_DEFAULT, \
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.slp_xpd = PMU_LP_SLP_XPD_SLEEP_DEFAULT, \
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@@ -419,7 +419,7 @@ typedef struct {
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typedef struct pmu_sleep_machine_constant {
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struct {
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uint16_t min_slp_time_us; /* Mininum sleep protection time (unit: microsecond) */
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uint16_t min_slp_time_us; /* Minimum sleep protection time (unit: microsecond) */
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uint8_t wakeup_wait_cycle; /* Modem wakeup signal (WiFi MAC and BEACON wakeup) waits for the slow & fast clock domain synchronization and the wakeup signal triggers the PMU FSM switching wait cycle (unit: slow clock cycle) */
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uint8_t reserved0;
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uint16_t reserved1;
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@@ -431,7 +431,7 @@ typedef struct pmu_sleep_machine_constant {
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uint16_t power_up_wait_time_us; /* (unit: microsecond) */
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} lp;
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struct {
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uint16_t min_slp_time_us; /* Mininum sleep protection time (unit: microsecond) */
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uint16_t min_slp_time_us; /* Minimum sleep protection time (unit: microsecond) */
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uint16_t clock_domain_sync_time_us; /* The Slow OSC clock domain synchronizes time with the Fast OSC domain, at least 4 slow clock cycles (unit: microsecond) */
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uint16_t system_dfs_up_work_time_us; /* System DFS up scaling work time (unit: microsecond) */
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uint16_t analog_wait_time_us; /* HP LDO power up wait time (unit: microsecond) */
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