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feat(pcnt): support pcnt on esp32h4

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This commit is contained in:
Chen Jichang
2025-08-26 16:40:14 +08:00
parent 04b934951e
commit ad5bdc83a7
30 changed files with 997 additions and 115 deletions
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16
components/soc/esp32h4/include/soc/Kconfig.soc_caps.in
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@@ -19,6 +19,10 @@ config SOC_GPTIMER_SUPPORTED
bool
default y
config SOC_PCNT_SUPPORTED
bool
default y
config SOC_TWAI_SUPPORTED
bool
default y
@@ -519,6 +523,18 @@ config SOC_MMU_DI_VADDR_SHARED
bool
default y
config SOC_PCNT_SUPPORT_RUNTIME_THRES_UPDATE
bool
default y
config SOC_PCNT_SUPPORT_CLEAR_SIGNAL
bool
default y
config SOC_PCNT_SUPPORT_STEP_NOTIFY
bool
default y
config SOC_RMT_GROUPS
int
default 1

17
components/soc/esp32h4/include/soc/clk_tree_defs.h
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@@ -214,6 +214,23 @@ typedef enum {
RMT_BASECLK_DEFAULT = SOC_MOD_CLK_XTAL, /*!< RMT source clock default choice is XTAL */
} soc_periph_rmt_clk_src_legacy_t;
//////////////////////////////////////////////////PCNT//////////////////////////////////////////////////////////////////
/**
* @brief Array initializer for all supported clock sources of PCNT
*/
#define SOC_PCNT_CLKS {SOC_MOD_CLK_XTAL, SOC_MOD_CLK_RC_FAST}
/**
* @brief Type of PCNT clock source
*/
typedef enum {
PCNT_CLK_SRC_XTAL = SOC_MOD_CLK_XTAL, /*!< Select XTAL as the source clock */
PCNT_CLK_SRC_RC_FAST = SOC_MOD_CLK_RC_FAST, /*!< Select RC_FAST as the source clock */
// PCNT_CLK_SRC_XTAL_X2_F32M = SOC_MOD_CLK_XTAL_X2_F32M, /*!< Select XTAL_X2_F32M as the source clock */
PCNT_CLK_SRC_DEFAULT = SOC_MOD_CLK_XTAL, /*!< Select XTAL as the default choice */
} soc_periph_pcnt_clk_src_t;
///////////////////////////////////////////////////UART/////////////////////////////////////////////////////////////////
/**

10
components/soc/esp32h4/include/soc/soc_caps.h
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@@ -38,7 +38,7 @@
#define SOC_GDMA_SUPPORTED 1
#define SOC_AHB_GDMA_SUPPORTED 1
#define SOC_GPTIMER_SUPPORTED 1
// #define SOC_PCNT_SUPPORTED 1 // TODO: [ESP32H4] IDF-12338
#define SOC_PCNT_SUPPORTED 1
// #define SOC_MCPWM_SUPPORTED 1 // TODO: [ESP32H4] IDF-12380
#define SOC_TWAI_SUPPORTED 1
#define SOC_ETM_SUPPORTED 1
@@ -315,11 +315,9 @@
// #define SOC_MPU_REGION_WO_SUPPORTED 0
/*-------------------------- PCNT CAPS ---------------------------------------*/
// #define SOC_PCNT_GROUPS 1U
// #define SOC_PCNT_UNITS_PER_GROUP 4
// #define SOC_PCNT_CHANNELS_PER_UNIT 2
// #define SOC_PCNT_THRES_POINT_PER_UNIT 2
// #define SOC_PCNT_SUPPORT_RUNTIME_THRES_UPDATE 1
#define SOC_PCNT_SUPPORT_RUNTIME_THRES_UPDATE 1
#define SOC_PCNT_SUPPORT_CLEAR_SIGNAL 1
#define SOC_PCNT_SUPPORT_STEP_NOTIFY 1
/*--------------------------- RMT CAPS ---------------------------------------*/
#define SOC_RMT_GROUPS 1U /*!< One RMT group */

6
components/soc/esp32h4/include/soc/soc_caps_full.h
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@@ -24,6 +24,12 @@
#define _SOC_CAPS_SDM_INST_NUM 1 // Number of SDM instances
#define _SOC_CAPS_SDM_CHANS_PER_INST 4 // Number of channels in each SDM instance
/*--------------------------- PCNT (Pulse Counter) ------------------------*/
#define _SOC_CAPS_PCNT_INST_NUM 1 // Number of PCNT instances
#define _SOC_CAPS_PCNT_UNITS_PER_INST 4 // Number of units in each PCNT instance
#define _SOC_CAPS_PCNT_CHANS_PER_UNIT 2 // Number of channels in each PCNT unit
#define _SOC_CAPS_PCNT_THRES_POINT_PER_UNIT 2 // Number of threshold points in each PCNT unit
/*--------------------------- ETM (Event Task Matrix) ----------------------------*/
#define _SOC_CAPS_ETM_INST_NUM 1 // Number of ETM instances
#define _SOC_CAPS_ETM_CHANS_PER_INST 50 // Number of channels in each ETM instance

70
components/soc/esp32h4/pcnt_periph.c Normal file
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@@ -0,0 +1,70 @@
/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/pcnt_periph.h"
#include "soc/gpio_sig_map.h"
#include "soc/pcnt_reg.h"
const soc_pcnt_signal_desc_t soc_pcnt_signals[1] = {
[0] = {
.irq_id = ETS_PCNT_INTR_SOURCE,
.module_name = "pcnt0",
.units = {
[0] = {
.channels = {
[0] = {
.ctl_sig_id_matrix = PCNT_CTRL_CH0_IN0_IDX,
.pulse_sig_id_matrix = PCNT_SIG_CH0_IN0_IDX
},
[1] = {
.ctl_sig_id_matrix = PCNT_CTRL_CH1_IN0_IDX,
.pulse_sig_id_matrix = PCNT_SIG_CH1_IN0_IDX
}
},
.clear_sig_id_matrix = PCNT_RST_IN0_IDX
},
[1] = {
.channels = {
[0] = {
.ctl_sig_id_matrix = PCNT_CTRL_CH0_IN1_IDX,
.pulse_sig_id_matrix = PCNT_SIG_CH0_IN1_IDX,
},
[1] = {
.ctl_sig_id_matrix = PCNT_CTRL_CH1_IN1_IDX,
.pulse_sig_id_matrix = PCNT_SIG_CH1_IN1_IDX
}
},
.clear_sig_id_matrix = PCNT_RST_IN1_IDX
},
[2] = {
.channels = {
[0] = {
.ctl_sig_id_matrix = PCNT_CTRL_CH0_IN2_IDX,
.pulse_sig_id_matrix = PCNT_SIG_CH0_IN2_IDX,
},
[1] = {
.ctl_sig_id_matrix = PCNT_CTRL_CH1_IN2_IDX,
.pulse_sig_id_matrix = PCNT_SIG_CH1_IN2_IDX
}
},
.clear_sig_id_matrix = PCNT_RST_IN2_IDX
},
[3] = {
.channels = {
[0] = {
.ctl_sig_id_matrix = PCNT_CTRL_CH0_IN3_IDX,
.pulse_sig_id_matrix = PCNT_SIG_CH0_IN3_IDX,
},
[1] = {
.ctl_sig_id_matrix = PCNT_CTRL_CH1_IN3_IDX,
.pulse_sig_id_matrix = PCNT_SIG_CH1_IN3_IDX
}
},
.clear_sig_id_matrix = PCNT_RST_IN3_IDX
}
}
}
};

97
components/soc/esp32h4/register/soc/pcnt_struct.h
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@@ -148,73 +148,22 @@ typedef union {
uint32_t val;
} pcnt_un_conf2_reg_t;
/** Type of u0_conf3 register
* Configuration register for unit $n's step value.
/** Type of un_conf3 register
* Configuration register for unit n's step value.
*/
typedef union {
struct {
/** cnt_h_step_u0 : R/W; bitpos: [15:0]; default: 0;
* Configures the forward rotation step value for unit 0.
/** cnt_h_step_un : R/W; bitpos: [15:0]; default: 0;
* Configures the forward rotation step value for unit n.
*/
uint32_t cnt_h_step_u0:16;
/** cnt_l_step_u0 : R/W; bitpos: [31:16]; default: 0;
* Configures the reverse rotation step value for unit 0.
uint32_t cnt_h_step_un:16;
/** cnt_l_step_un : R/W; bitpos: [31:16]; default: 0;
* Configures the reverse rotation step value for unit n.
*/
uint32_t cnt_l_step_u0:16;
uint32_t cnt_l_step_un:16;
};
uint32_t val;
} pcnt_u0_conf3_reg_t;
/** Type of u1_conf3 register
* Configuration register for unit $n's step value.
*/
typedef union {
struct {
/** cnt_h_step_u1 : R/W; bitpos: [15:0]; default: 0;
* Configures the forward rotation step value for unit 1.
*/
uint32_t cnt_h_step_u1:16;
/** cnt_l_step_u1 : R/W; bitpos: [31:16]; default: 0;
* Configures the reverse rotation step value for unit 1.
*/
uint32_t cnt_l_step_u1:16;
};
uint32_t val;
} pcnt_u1_conf3_reg_t;
/** Type of u2_conf3 register
* Configuration register for unit $n's step value.
*/
typedef union {
struct {
/** cnt_h_step_u2 : R/W; bitpos: [15:0]; default: 0;
* Configures the forward rotation step value for unit 2.
*/
uint32_t cnt_h_step_u2:16;
/** cnt_l_step_u2 : R/W; bitpos: [31:16]; default: 0;
* Configures the reverse rotation step value for unit 2.
*/
uint32_t cnt_l_step_u2:16;
};
uint32_t val;
} pcnt_u2_conf3_reg_t;
/** Type of u3_conf3 register
* Configuration register for unit $n's step value.
*/
typedef union {
struct {
/** cnt_h_step_u3 : R/W; bitpos: [15:0]; default: 0;
* Configures the forward rotation step value for unit 3.
*/
uint32_t cnt_h_step_u3:16;
/** cnt_l_step_u3 : R/W; bitpos: [31:16]; default: 0;
* Configures the reverse rotation step value for unit 3.
*/
uint32_t cnt_l_step_u3:16;
};
uint32_t val;
} pcnt_u3_conf3_reg_t;
} pcnt_un_conf3_reg_t;
/** Type of ctrl register
* Control register for all counters
@@ -484,29 +433,19 @@ typedef union {
} pcnt_date_reg_t;
typedef struct {
volatile pcnt_un_conf0_reg_t u0_conf0;
volatile pcnt_un_conf1_reg_t u0_conf1;
volatile pcnt_un_conf2_reg_t u0_conf2;
volatile pcnt_u0_conf3_reg_t u0_conf3;
volatile pcnt_un_conf0_reg_t u1_conf0;
volatile pcnt_un_conf1_reg_t u1_conf1;
volatile pcnt_un_conf2_reg_t u1_conf2;
volatile pcnt_u1_conf3_reg_t u1_conf3;
volatile pcnt_un_conf0_reg_t u2_conf0;
volatile pcnt_un_conf1_reg_t u2_conf1;
volatile pcnt_un_conf2_reg_t u2_conf2;
volatile pcnt_u2_conf3_reg_t u2_conf3;
volatile pcnt_un_conf0_reg_t u3_conf0;
volatile pcnt_un_conf1_reg_t u3_conf1;
volatile pcnt_un_conf2_reg_t u3_conf2;
volatile pcnt_u3_conf3_reg_t u3_conf3;
volatile pcnt_un_cnt_reg_t un_cnt[4];
typedef struct pcnt_dev_t {
volatile struct {
pcnt_un_conf0_reg_t conf0;
pcnt_un_conf1_reg_t conf1;
pcnt_un_conf2_reg_t conf2;
pcnt_un_conf3_reg_t conf3;
} conf_unit[4];
volatile pcnt_un_cnt_reg_t cnt_unit[4];
volatile pcnt_int_raw_reg_t int_raw;
volatile pcnt_int_st_reg_t int_st;
volatile pcnt_int_ena_reg_t int_ena;
volatile pcnt_int_clr_reg_t int_clr;
volatile pcnt_un_status_reg_t un_status[4];
volatile pcnt_un_status_reg_t status_unit[4];
volatile pcnt_ctrl_reg_t ctrl;
uint32_t reserved_074[34];
volatile pcnt_date_reg_t date;