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esp32: Fixes issues discussed during code review of MR!341

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The following issues mentioned during MR!341 review were fixed:
1) Core dump test application description
2) Usage of CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH and CONFIG_ESP32_ENABLE_COREDUMP_TO_UART
3) FLASH_GUARD_START macro usage is fixed in flash API
4) Core dump module logging facility
5) cache util functions doc updated
6) interactive delay before print core dump to uart
7) core dump partion support in build system
This commit is contained in:
Alexey Gerenkov
2017-01-10 14:48:47 +03:00
parent 50b3ce616f
commit ad66fbe5ad
15 changed files with 324 additions and 186 deletions
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6
components/spi_flash/cache_utils.h
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@@ -41,13 +41,11 @@ void spi_flash_disable_interrupts_caches_and_other_cpu();
void spi_flash_enable_interrupts_caches_and_other_cpu();
// Disables non-IRAM interrupt handlers on current CPU and caches on both CPUs.
// This function is implied to be called from panic handler
// (when non-current CPU is halted and can not execute code from flash) or when no OS is present.
// This function is implied to be called when other CPU is not running or running code from IRAM.
void spi_flash_disable_interrupts_caches_and_other_cpu_no_os();
// Enable cache, enable interrupts on current CPU.
// This function is implied to be called from panic handler
// (when non-current CPU is halted and can not execute code from flash) or when no OS is present.
// This function is implied to be called when other CPU is not running or running code from IRAM.
void spi_flash_enable_interrupts_caches_no_os();
#endif //ESP_SPI_FLASH_CACHE_UTILS_H