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spi_flash_write_encrypted: Allow 16-byte aligned block writes

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As each 32 byte write has two identical 16 byte AES blocks, it's
possible to write them separately.
This commit is contained in:
Angus Gratton
2017-01-04 17:53:15 +11:00
committed by Ivan Grokhotkov
parent 36ccdee6ec
commit adc590ff69
3 changed files with 140 additions and 19 deletions
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54
components/spi_flash/flash_ops.c
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@@ -90,7 +90,7 @@ size_t spi_flash_get_chip_size()
return g_rom_flashchip.chip_size;
}
SpiFlashOpResult IRAM_ATTR spi_flash_unlock()
static SpiFlashOpResult IRAM_ATTR spi_flash_unlock()
{
static bool unlocked = false;
if (!unlocked) {
@@ -260,30 +260,58 @@ out:
esp_err_t IRAM_ATTR spi_flash_write_encrypted(size_t dest_addr, const void *src, size_t size)
{
if ((dest_addr % 32) != 0) {
const uint8_t *ssrc = (const uint8_t *)src;
if ((dest_addr % 16) != 0) {
return ESP_ERR_INVALID_ARG;
}
if ((size % 32) != 0) {
if ((size % 16) != 0) {
return ESP_ERR_INVALID_SIZE;
}
if ((uint32_t) src < 0x3ff00000) {
// if source address is in DROM, we won't be able to read it
// from within SPIWrite
// TODO: consider buffering source data using heap and writing it anyway?
return ESP_ERR_INVALID_ARG;
}
COUNTER_START();
spi_flash_disable_interrupts_caches_and_other_cpu();
SpiFlashOpResult rc;
rc = spi_flash_unlock();
spi_flash_enable_interrupts_caches_and_other_cpu();
if (rc == SPI_FLASH_RESULT_OK) {
/* SPI_Encrypt_Write encrypts data in RAM as it writes,
so copy to a temporary buffer - 32 bytes at a time.
Each call to SPI_Encrypt_Write takes a 32 byte "row" of
data to encrypt, and each row is two 16 byte AES blocks
that share a key (as derived from flash address).
*/
uint32_t encrypt_buf[32/sizeof(uint32_t)];
for (size_t i = 0; i < size; i += 32) {
memcpy(encrypt_buf, ((const uint8_t *)src) + i, 32);
rc = SPI_Encrypt_Write((uint32_t) dest_addr + i, encrypt_buf, 32);
uint8_t encrypt_buf[32] __attribute__((aligned(4)));
uint32_t row_size;
for (size_t i = 0; i < size; i += row_size) {
uint32_t row_addr = dest_addr + i;
if (i == 0 && (row_addr % 32) != 0) {
/* writing to second block of a 32 byte row */
row_size = 16;
row_addr -= 16;
/* copy to second block in buffer */
memcpy(encrypt_buf + 16, ssrc + i, 16);
/* decrypt the first block from flash, will reencrypt to same bytes */
spi_flash_read_encrypted(row_addr, encrypt_buf, 16);
}
else if (size - i == 16) {
/* 16 bytes left, is first block of a 32 byte row */
row_size = 16;
/* copy to first block in buffer */
memcpy(encrypt_buf, ssrc + i, 16);
/* decrypt the second block from flash, will reencrypt to same bytes */
spi_flash_read_encrypted(row_addr + 16, encrypt_buf + 16, 16);
}
else {
/* Writing a full 32 byte row (2 blocks) */
row_size = 32;
memcpy(encrypt_buf, ssrc + i, 32);
}
spi_flash_disable_interrupts_caches_and_other_cpu();
rc = SPI_Encrypt_Write(row_addr, (uint32_t *)encrypt_buf, 32);
spi_flash_enable_interrupts_caches_and_other_cpu();
if (rc != SPI_FLASH_RESULT_OK) {
break;
}