diff --git a/components/bootloader_support/src/bootloader_common.c b/components/bootloader_support/src/bootloader_common.c index 709504d386..27191de8ff 100644 --- a/components/bootloader_support/src/bootloader_common.c +++ b/components/bootloader_support/src/bootloader_common.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2018-2022 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -21,6 +21,7 @@ #include "soc/gpio_periph.h" #include "soc/rtc.h" #include "soc/efuse_reg.h" +#include "soc/soc_caps.h" #include "hal/gpio_ll.h" #include "esp_image_format.h" #include "bootloader_sha.h" @@ -195,6 +196,7 @@ RESET_REASON bootloader_common_get_reset_reason(int cpu_no) uint8_t bootloader_flash_get_cs_io(void) { +#if SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE uint8_t cs_io; const uint32_t spiconfig = esp_rom_efuse_get_flash_gpio_info(); if (spiconfig == ESP_ROM_EFUSE_FLASH_DEFAULT_SPI) { @@ -203,4 +205,7 @@ uint8_t bootloader_flash_get_cs_io(void) cs_io = (spiconfig >> 18) & 0x3f; } return cs_io; +#else + return SPI_CS0_GPIO_NUM; +#endif } diff --git a/components/soc/esp32/include/soc/Kconfig.soc_caps.in b/components/soc/esp32/include/soc/Kconfig.soc_caps.in index 7340e5b2dd..4a395ae568 100644 --- a/components/soc/esp32/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32/include/soc/Kconfig.soc_caps.in @@ -579,6 +579,10 @@ config SOC_SPIRAM_SUPPORTED bool default y +config SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE + bool + default y + config SOC_SHA_SUPPORT_PARALLEL_ENG bool default y diff --git a/components/soc/esp32/include/soc/soc_caps.h b/components/soc/esp32/include/soc/soc_caps.h index ae2ecb89be..56d0a4c925 100644 --- a/components/soc/esp32/include/soc/soc_caps.h +++ b/components/soc/esp32/include/soc/soc_caps.h @@ -310,6 +310,9 @@ /*-------------------------- SPIRAM CAPS -------------------------------------*/ #define SOC_SPIRAM_SUPPORTED 1 +/*-------------------------- SPI MEM CAPS ---------------------------------------*/ +#define SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE (1) + /*--------------------------- SHA CAPS ---------------------------------------*/ /* ESP32 style SHA engine, where multiple states can be stored in parallel */ #define SOC_SHA_SUPPORT_PARALLEL_ENG (1) diff --git a/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in index 4e06c8853f..5d4b54e9e0 100644 --- a/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in @@ -375,6 +375,10 @@ config SOC_SPI_MEM_SUPPORT_CHECK_SUS bool default y +config SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE + bool + default n + config SOC_MEMSPI_SRC_FREQ_60M_SUPPORTED bool default y diff --git a/components/soc/esp32c2/include/soc/soc_caps.h b/components/soc/esp32c2/include/soc/soc_caps.h index 2350c6e882..6d2f50a05a 100644 --- a/components/soc/esp32c2/include/soc/soc_caps.h +++ b/components/soc/esp32c2/include/soc/soc_caps.h @@ -203,6 +203,7 @@ #define SOC_SPI_MEM_SUPPORT_IDLE_INTR (1) #define SOC_SPI_MEM_SUPPORT_SW_SUSPEND (1) #define SOC_SPI_MEM_SUPPORT_CHECK_SUS (1) +#define SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE (0) #define SOC_MEMSPI_SRC_FREQ_60M_SUPPORTED 1 #define SOC_MEMSPI_SRC_FREQ_30M_SUPPORTED 1 diff --git a/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in index e234e9f6dd..a648ec6881 100644 --- a/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in @@ -551,6 +551,10 @@ config SOC_SPI_MEM_SUPPORT_CHECK_SUS bool default y +config SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE + bool + default y + config SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED bool default y diff --git a/components/soc/esp32c3/include/soc/soc_caps.h b/components/soc/esp32c3/include/soc/soc_caps.h index 5f29f7e4b0..3d141eb8bd 100644 --- a/components/soc/esp32c3/include/soc/soc_caps.h +++ b/components/soc/esp32c3/include/soc/soc_caps.h @@ -272,6 +272,7 @@ #define SOC_SPI_MEM_SUPPORT_IDLE_INTR (1) #define SOC_SPI_MEM_SUPPORT_SW_SUSPEND (1) #define SOC_SPI_MEM_SUPPORT_CHECK_SUS (1) +#define SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE (1) #define SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED 1 #define SOC_MEMSPI_SRC_FREQ_40M_SUPPORTED 1 diff --git a/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in b/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in index 4f6cee872d..6dee4b6868 100644 --- a/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in @@ -539,6 +539,10 @@ config SOC_SPI_MEM_SUPPORT_CHECK_SUS bool default y +config SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE + bool + default y + config SOC_MEMSPI_SRC_FREQ_48M_SUPPORTED bool default y diff --git a/components/soc/esp32h2/include/soc/soc_caps.h b/components/soc/esp32h2/include/soc/soc_caps.h index 2a2ad20274..db63173118 100644 --- a/components/soc/esp32h2/include/soc/soc_caps.h +++ b/components/soc/esp32h2/include/soc/soc_caps.h @@ -280,6 +280,7 @@ #define SOC_SPI_MEM_SUPPORT_IDLE_INTR (1) #define SOC_SPI_MEM_SUPPORT_SW_SUSPEND (1) #define SOC_SPI_MEM_SUPPORT_CHECK_SUS (1) +#define SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE (1) #define SOC_MEMSPI_SRC_FREQ_48M_SUPPORTED 1 #define SOC_MEMSPI_SRC_FREQ_24M_SUPPORTED 1 diff --git a/components/soc/esp32s2/include/soc/Kconfig.soc_caps.in b/components/soc/esp32s2/include/soc/Kconfig.soc_caps.in index 63c44b589f..df5a9901e4 100644 --- a/components/soc/esp32s2/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32s2/include/soc/Kconfig.soc_caps.in @@ -807,6 +807,10 @@ config SOC_SPI_MEM_SUPPORT_SW_SUSPEND bool default y +config SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE + bool + default y + config SOC_PM_SUPPORT_EXT_WAKEUP bool default y diff --git a/components/soc/esp32s2/include/soc/soc_caps.h b/components/soc/esp32s2/include/soc/soc_caps.h index a56d50a693..32b0671d64 100644 --- a/components/soc/esp32s2/include/soc/soc_caps.h +++ b/components/soc/esp32s2/include/soc/soc_caps.h @@ -372,6 +372,8 @@ #define SOC_SPI_MEM_SUPPORT_AUTO_WAIT_IDLE (1) #define SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND (1) #define SOC_SPI_MEM_SUPPORT_SW_SUSPEND (1) +#define SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE (1) + /*-------------------------- Power Management CAPS ---------------------------*/ #define SOC_PM_SUPPORT_EXT_WAKEUP (1) diff --git a/components/soc/esp32s3/include/soc/Kconfig.soc_caps.in b/components/soc/esp32s3/include/soc/Kconfig.soc_caps.in index 7ab39fabc4..432b5181c9 100644 --- a/components/soc/esp32s3/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32s3/include/soc/Kconfig.soc_caps.in @@ -947,6 +947,10 @@ config SOC_SPI_MEM_SUPPORT_TIME_TUNING bool default y +config SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE + bool + default y + config SOC_COEX_HW_PTI bool default y diff --git a/components/soc/esp32s3/include/soc/soc_caps.h b/components/soc/esp32s3/include/soc/soc_caps.h index ec2838ac4a..17824d08d4 100644 --- a/components/soc/esp32s3/include/soc/soc_caps.h +++ b/components/soc/esp32s3/include/soc/soc_caps.h @@ -403,6 +403,7 @@ #define SOC_SPI_MEM_SUPPORT_SW_SUSPEND (1) #define SOC_SPI_MEM_SUPPORT_OPI_MODE (1) #define SOC_SPI_MEM_SUPPORT_TIME_TUNING (1) +#define SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE (1) /*-------------------------- COEXISTENCE HARDWARE PTI CAPS -------------------------------*/ #define SOC_COEX_HW_PTI (1)