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feat(system): add option to allow user disable USJ module to save power

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This commit is contained in:
wuzhenghui
2023-12-13 17:37:06 +08:00
parent 85b246ac88
commit b0fa4565a1
12 changed files with 104 additions and 7 deletions
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13
components/hal/esp32s3/include/hal/usb_fsls_phy_ll.h
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@@ -69,6 +69,19 @@ static inline void usb_fsls_phy_ll_int_jtag_enable(usb_serial_jtag_dev_t *hw)
RTCCNTL.usb_conf.sw_usb_phy_sel = 0;
}
/**
* @brief Disable the internal PHY for USB_Serial_JTAG
*
* @param hw Start address of the USB Serial_JTAG registers
*/
static inline void usb_fsls_phy_ll_int_jtag_disable(usb_serial_jtag_dev_t *hw)
{
// Disable USB D+ pullup
hw->conf0.dp_pullup = 0;
// Disable USB pad function
hw->conf0.usb_pad_enable = 0;
}
/**
* @brief Configures the external PHY for USB_Serial_JTAG
*

4
components/hal/esp32s3/include/hal/usb_serial_jtag_ll.h
View File

@@ -206,13 +206,13 @@ FORCE_INLINE_ATTR void usb_serial_jtag_ll_enable_pad(bool enable_pad)
* @brief Enable the bus clock for USB Serial_JTAG module
* @param clk_en True if enable the clock of USB Serial_JTAG module
*/
FORCE_INLINE_ATTR void usb_serial_jtag_ll_enable_bus_clock(bool clk_en)
FORCE_INLINE_ATTR void _usb_serial_jtag_ll_enable_bus_clock(bool clk_en)
{
SYSTEM.perip_clk_en1.usb_device_clk_en = clk_en;
}
// SYSTEM.perip_clk_enx are shared registers, so this function must be used in an atomic way
#define usb_serial_jtag_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; usb_serial_jtag_ll_enable_bus_clock(__VA_ARGS__)
#define usb_serial_jtag_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; _usb_serial_jtag_ll_enable_bus_clock(__VA_ARGS__)
/**
* @brief Reset the usb serial jtag module