fix(esp32c5mp): fix public headers

components/hal/esp32c5/include/hal/clk_tree_ll.h

@@ -339,7 +339,7 @@ static inline __attribute__((always_inline)) void clk_ll_bbpll_set_config(uint32
 
     /* Configure 480M PLL */
     switch (xtal_freq_mhz) {
-    case RTC_XTAL_FREQ_40M:
+    case SOC_XTAL_FREQ_40M:
     default:
         div_ref = 0;
         div7_0 = 8;

components/hal/esp32c5/include/hal/gdma_ll.h

@@ -8,6 +8,8 @@
 #include <stddef.h> /* Required for NULL constant */
 #include <stdint.h>
 #include <stdbool.h>
+#include "soc/soc_caps.h"
+#if SOC_GDMA_SUPPORTED  // TODO: [ESP32C5] IDF-8710
 #include "hal/gdma_types.h"
 #include "soc/gdma_struct.h"
 #include "soc/gdma_reg.h"
@@ -625,3 +627,5 @@ static inline void gdma_ll_tx_enable_etm_task(gdma_dev_t *dev, uint32_t channel,
 #ifdef __cplusplus
 }
 #endif
+
+#endif  // SOC_GDMA_SUPPORTED

components/hal/esp32c5/include/hal/i2c_ll.h

@@ -9,8 +9,10 @@
 #pragma once
 
 #include <stdbool.h>
+#include "soc/soc_caps.h"
 #include "hal/misc.h"
 #include "hal/assert.h"
+#if SOC_I2C_SUPPORTED  // TODO: [ESP32C5] IDF-8694
 #include "soc/i2c_periph.h"
 #include "soc/soc_caps.h"
 #include "soc/i2c_struct.h"
@@ -1119,3 +1121,5 @@ static inline void i2c_ll_get_scl_timing(i2c_dev_t *hw, int *high_period, int *l
 #ifdef __cplusplus
 }
 #endif
+
+#endif  // SOC_I2C_SUPPORTED

components/hal/esp32c5/include/hal/mmu_ll.h

@@ -8,11 +8,16 @@
 
 #pragma once
 
+#include <stdint.h>
+#include <stdbool.h>
 #include "soc/spi_mem_reg.h"
 #include "soc/ext_mem_defs.h"
+#include "soc/soc_caps.h"
 #include "hal/assert.h"
 #include "hal/mmu_types.h"
+#if SOC_EFUSE_SUPPORTED
 #include "hal/efuse_ll.h"
+#endif
 
 
 #ifdef __cplusplus
@@ -53,10 +58,14 @@ static inline uint32_t mmu_ll_laddr_to_vaddr(uint32_t laddr, mmu_vaddr_t vaddr_t
 __attribute__((always_inline)) static inline bool mmu_ll_cache_encryption_enabled(void)
 {
     // TODO: [ESP32C5] IDF-8658 (inherit from C6)
+#if SOC_EFUSE_SUPPORTED
     unsigned cnt = efuse_ll_get_flash_crypt_cnt();
     // 3 bits wide, any odd number - 1 or 3 - bits set means encryption is on
     cnt = ((cnt >> 2) ^ (cnt >> 1) ^ cnt) & 0x1;
     return (cnt == 1);
+#else
+    return false;
+#endif
 }
 
 /**

components/hal/esp32c5/include/hal/rtc_io_ll.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -16,8 +16,8 @@
 #include <stdbool.h>
 #include "soc/soc_caps.h"
 #include "soc/pcr_struct.h"
-#include "soc/lp_io_struct.h"
-#include "soc/lp_aon_struct.h"
+// #include "soc/lp_io_struct.h"
+// #include "soc/lp_aon_struct.h"
 #include "soc/pmu_struct.h"
 #include "hal/misc.h"
 #include "hal/assert.h"