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Merge branch 'bugfix/fix_Cache_Count_Flash_bug_v5.1' into 'release/v5.1'

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cache: patch some rom cache api, rename those apis in ld (backport v5.1)

See merge request espressif/esp-idf!24289
This commit is contained in:
Jiang Jiang Jian
2023-07-04 12:07:25 +08:00
parent 27a5a6fcae 4ba10243f4
commit b2b0940516
10 changed files with 111 additions and 21 deletions
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8
components/esp_rom/esp32s3/Kconfig.soc_caps.in
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@@ -70,3 +70,11 @@ config ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE
config ESP_ROM_RAM_APP_NEEDS_MMU_INIT
bool
default y
config ESP_ROM_HAS_FLASH_COUNT_PAGES_BUG
bool
default y
config ESP_ROM_HAS_CACHE_SUSPEND_WAITI_BUG
bool
default y

2
components/esp_rom/esp32s3/esp_rom_caps.h
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@@ -23,3 +23,5 @@
#define ESP_ROM_HAS_NEWLIB_NANO_FORMAT (1) // ROM has the newlib nano version of formatting functions
#define ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE (1) // ROM needs to set cache MMU size according to instruction and rodata for flash mmap
#define ESP_ROM_RAM_APP_NEEDS_MMU_INIT (1) // ROM doesn't init cache MMU when it's a RAM APP, needs MMU hal to init
#define ESP_ROM_HAS_FLASH_COUNT_PAGES_BUG (1) // ROM api Cache_Count_Flash_Pages will return unexpected value
#define ESP_ROM_HAS_CACHE_SUSPEND_WAITI_BUG (1) // ROM api Cache_Suspend_I/DCache and Cache_Freeze_I/DCache_Enable does not waiti

10
components/esp_rom/esp32s3/ld/esp32s3.rom.ld
View File

@@ -420,15 +420,15 @@ PROVIDE( Cache_Disable_ICache = 0x4000186c );
PROVIDE( Cache_Enable_ICache = 0x40001878 );
PROVIDE( Cache_Disable_DCache = 0x40001884 );
PROVIDE( Cache_Enable_DCache = 0x40001890 );
PROVIDE( Cache_Suspend_ICache = 0x4000189c );
PROVIDE( rom_Cache_Suspend_ICache = 0x4000189c );
PROVIDE( Cache_Resume_ICache = 0x400018a8 );
PROVIDE( Cache_Suspend_DCache = 0x400018b4 );
PROVIDE( rom_Cache_Suspend_DCache = 0x400018b4 );
PROVIDE( Cache_Resume_DCache = 0x400018c0 );
PROVIDE( Cache_Occupy_Items = 0x400018cc );
PROVIDE( Cache_Occupy_Addr = 0x400018d8 );
PROVIDE( Cache_Freeze_ICache_Enable = 0x400018e4 );
PROVIDE( rom_Cache_Freeze_ICache_Enable = 0x400018e4 );
PROVIDE( Cache_Freeze_ICache_Disable = 0x400018f0 );
PROVIDE( Cache_Freeze_DCache_Enable = 0x400018fc );
PROVIDE( rom_Cache_Freeze_DCache_Enable = 0x400018fc );
PROVIDE( Cache_Freeze_DCache_Disable = 0x40001908 );
PROVIDE( Cache_Set_IDROM_MMU_Size = 0x40001914 );
PROVIDE( flash2spiram_instruction_offset = 0x40001920 );
@@ -444,7 +444,7 @@ PROVIDE( Cache_Occupy_DCache_MEMORY = 0x4000198c );
PROVIDE( Cache_MMU_Init = 0x40001998 );
PROVIDE( Cache_Ibus_MMU_Set = 0x400019a4 );
PROVIDE( Cache_Dbus_MMU_Set = 0x400019b0 );
PROVIDE( Cache_Count_Flash_Pages = 0x400019bc );
PROVIDE( rom_Cache_Count_Flash_Pages = 0x400019bc );
PROVIDE( Cache_Flash_To_SPIRAM_Copy = 0x400019c8 );
PROVIDE( Cache_Travel_Tag_Memory = 0x400019d4 );
PROVIDE( Cache_Travel_Tag_Memory2 = 0x400019e0 );