fix(clk): XTAL_X2 clock is not usable on H21 MPW and H4 BETA5

This commit is contained in:
Song Ruo Jing
2025-07-09 22:11:02 +08:00
parent caa382047b
commit b3fd9b6afa
15 changed files with 256 additions and 253 deletions

View File

@@ -81,10 +81,11 @@ void IRAM_ATTR bootloader_configure_spi_pins(int drv)
static void IRAM_ATTR bootloader_flash_clock_init(void)
{
// To raise the MSPI clock to 64MHz, needs to enable the 64MHz clock source, which is XTAL_X2_CLK
// (FPGA image fixed MSPI0/1 clock to 64MHz)
clk_ll_xtal_x2_enable();
_mspi_timing_ll_set_flash_clk_src(0, FLASH_CLK_SRC_PLL_F64M);
// // To raise the MSPI clock to 64MHz, needs to enable the 64MHz clock source, which is XTAL_X2_CLK
// // (FPGA image fixed MSPI0/1 clock to 64MHz)
// clk_ll_xtal_x2_enable();
// _mspi_timing_ll_set_flash_clk_src(0, FLASH_CLK_SRC_PLL_F64M);
_mspi_timing_ll_set_flash_clk_src(0, FLASH_CLK_SRC_PLL_F48M);
}
static void update_flash_config(const esp_image_header_t *bootloader_hdr)