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feat(dedic_gpio): add reset and clock control functions
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -28,6 +28,8 @@
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#include "soc/dedic_gpio_periph.h"
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#if SOC_DEDIC_GPIO_ALLOW_REG_ACCESS
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#include "soc/dedic_gpio_struct.h"
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#endif
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#if !SOC_DEDIC_PERIPH_ALWAYS_ENABLE
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#include "hal/dedic_gpio_ll.h"
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#endif
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@@ -84,7 +86,11 @@ static esp_err_t dedic_gpio_build_platform(int core_id)
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s_platform[core_id]->dev = &DEDIC_GPIO;
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#endif // SOC_DEDIC_GPIO_ALLOW_REG_ACCESS
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#if !SOC_DEDIC_PERIPH_ALWAYS_ENABLE
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periph_module_enable(dedic_gpio_periph_signals.module); // enable APB clock to peripheral
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// enable dedicated GPIO register clock
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PERIPH_RCC_ATOMIC() {
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dedic_gpio_ll_enable_bus_clock(true);
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dedic_gpio_ll_reset_register();
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}
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#endif // !SOC_DEDIC_PERIPH_ALWAYS_ENABLE
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}
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}
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@@ -107,7 +113,10 @@ static void dedic_gpio_break_platform(uint32_t core_id)
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free(s_platform[core_id]);
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s_platform[core_id] = NULL;
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#if !SOC_DEDIC_PERIPH_ALWAYS_ENABLE
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periph_module_disable(dedic_gpio_periph_signals.module); // disable module if no GPIO channel is being used
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// disable the register clock if no GPIO channel is in use
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PERIPH_RCC_ATOMIC() {
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dedic_gpio_ll_enable_bus_clock(false);
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}
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#endif // !SOC_DEDIC_PERIPH_ALWAYS_ENABLE
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}
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_lock_release(&s_platform_mutexlock[core_id]);
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