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esp32/rtc: fix xtal unstable in some cases when sleep

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1. add xtal buf wait to fix high temperature restart issue
2. add min sleep value to fix xtal stop due to too short sleep time issue
This commit is contained in:
jingli
2022-10-09 14:53:59 +08:00
parent a2086ca355
commit b6491464e1
10 changed files with 33 additions and 25 deletions
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3
components/soc/esp32/include/soc/rtc.h
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@@ -555,12 +555,13 @@ typedef struct rtc_sleep_config_s {
#define RTC_SLEEP_PD_INT_8M BIT(7) //!< Power down Internal 8M oscillator
/* Various delays to be programmed into power control state machines */
#define RTC_CNTL_XTL_BUF_WAIT_SLP_US (500)
#define RTC_CNTL_XTL_BUF_WAIT_SLP_US (1000)
#define RTC_CNTL_PLL_BUF_WAIT_SLP_CYCLES (1)
#define RTC_CNTL_CK8M_WAIT_SLP_CYCLES (4)
#define RTC_CNTL_WAKEUP_DELAY_CYCLES (7)
#define RTC_CNTL_OTHER_BLOCKS_POWERUP_CYCLES (1)
#define RTC_CNTL_OTHER_BLOCKS_WAIT_CYCLES (1)
#define RTC_CNTL_MIN_SLP_VAL_MIN (128)
/**
* @brief Prepare the chip to enter sleep mode

1
components/soc/esp32/include/soc/rtc_cntl_reg.h
View File

@@ -441,7 +441,6 @@
#define RTC_CNTL_MIN_SLP_VAL_M ((RTC_CNTL_MIN_SLP_VAL_V)<<(RTC_CNTL_MIN_SLP_VAL_S))
#define RTC_CNTL_MIN_SLP_VAL_V 0xFF
#define RTC_CNTL_MIN_SLP_VAL_S 8
#define RTC_CNTL_MIN_SLP_VAL_MIN 2
/* RTC_CNTL_ULP_CP_SUBTIMER_PREDIV : R/W ;bitpos:[7:0] ;default: 8'd1 ; */
/*description: */
#define RTC_CNTL_ULP_CP_SUBTIMER_PREDIV 0x000000FF