esp_rom: Add initial ESP32-C3 support

From internal commit 7761d6e8

components/esp_rom/esp32c3/esp_rom_caps.h

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+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#define ESP_ROM_HAS_CRC_LE      (1) // ROM CRC library supports Little Endian
+#define ESP_ROM_HAS_CRC_BE      (1) // ROM CRC library supports Big Endian
+#define ESP_ROM_HAS_JPEG_DECODE (1) // ROM has JPEG decode library

components/esp_rom/esp32c3/ld/esp32c3.rom.api.ld

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+/** ROM APIs
+ */
+PROVIDE ( esp_rom_crc32_le = crc32_le );
+PROVIDE ( esp_rom_crc16_le = crc16_le );
+PROVIDE ( esp_rom_crc8_le  = crc8_le );
+PROVIDE ( esp_rom_crc32_be = crc32_be );
+PROVIDE ( esp_rom_crc16_be = crc16_be );
+PROVIDE ( esp_rom_crc8_be  = crc8_be );
+
+PROVIDE ( esp_rom_gpio_pad_select_gpio    = gpio_pad_select_gpio );
+PROVIDE ( esp_rom_gpio_pad_pullup_only    = gpio_pad_pullup );
+PROVIDE ( esp_rom_gpio_pad_set_drv        = gpio_pad_set_drv );
+PROVIDE ( esp_rom_gpio_pad_unhold         = gpio_pad_unhold );
+PROVIDE ( esp_rom_gpio_connect_in_signal  = gpio_matrix_in );
+PROVIDE ( esp_rom_gpio_connect_out_signal = gpio_matrix_out );
+
+PROVIDE ( esp_rom_efuse_mac_address_crc8       = esp_crc8 );
+PROVIDE ( esp_rom_efuse_get_flash_gpio_info    = ets_efuse_get_spiconfig );
+PROVIDE ( esp_rom_efuse_is_secure_boot_enabled = ets_efuse_secure_boot_enabled );
+PROVIDE ( esp_rom_efuse_get_flash_wp_gpio      = ets_efuse_get_wp_pad );
+
+PROVIDE ( esp_rom_uart_flush_tx       = uart_tx_flush );
+PROVIDE ( esp_rom_uart_tx_one_char    = uart_tx_one_char );
+PROVIDE ( esp_rom_uart_tx_wait_idle   = uart_tx_wait_idle );
+PROVIDE ( esp_rom_uart_rx_one_char    = uart_rx_one_char );
+PROVIDE ( esp_rom_uart_rx_string      = UartRxString );
+PROVIDE ( esp_rom_uart_set_as_console = uart_tx_switch );
+PROVIDE ( esp_rom_uart_putc           = ets_write_char_uart );
+
+PROVIDE ( esp_rom_md5_init   = MD5Init );
+PROVIDE ( esp_rom_md5_update = MD5Update );
+PROVIDE ( esp_rom_md5_final  = MD5Final );
+
+PROVIDE ( esp_rom_printf   = ets_printf );
+PROVIDE ( esp_rom_delay_us = ets_delay_us );

components/esp_rom/esp32c3/ld/esp32c3.rom.libgcc.ld

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+/* ROM function interface esp32c3.rom.libgcc.ld for esp32c3
+ *
+ *
+ * Generated from ./interface-esp32c3.yml md5sum 93b28a9e1fe42d212018eb4336849208
+ *
+ * Compatible with ROM where ECO version equal or greater to 0.
+ *
+ * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
+ */
+
+/***************************************
+ Group libgcc
+ ***************************************/
+
+/* Functions */
+__absvdi2 = 0x40000764;
+__absvsi2 = 0x40000768;
+__adddf3 = 0x4000076c;
+__addsf3 = 0x40000770;
+__addvdi3 = 0x40000774;
+__addvsi3 = 0x40000778;
+__ashldi3 = 0x4000077c;
+__ashrdi3 = 0x40000780;
+__bswapdi2 = 0x40000784;
+__bswapsi2 = 0x40000788;
+__clear_cache = 0x4000078c;
+__clrsbdi2 = 0x40000790;
+__clrsbsi2 = 0x40000794;
+__clzdi2 = 0x40000798;
+__clzsi2 = 0x4000079c;
+__cmpdi2 = 0x400007a0;
+__ctzdi2 = 0x400007a4;
+__ctzsi2 = 0x400007a8;
+__divdc3 = 0x400007ac;
+__divdf3 = 0x400007b0;
+__divdi3 = 0x400007b4;
+__divsc3 = 0x400007b8;
+__divsf3 = 0x400007bc;
+__divsi3 = 0x400007c0;
+__eqdf2 = 0x400007c4;
+__eqsf2 = 0x400007c8;
+__extendsfdf2 = 0x400007cc;
+__ffsdi2 = 0x400007d0;
+__ffssi2 = 0x400007d4;
+__fixdfdi = 0x400007d8;
+__fixdfsi = 0x400007dc;
+__fixsfdi = 0x400007e0;
+__fixsfsi = 0x400007e4;
+__fixunsdfsi = 0x400007e8;
+__fixunssfdi = 0x400007ec;
+__fixunssfsi = 0x400007f0;
+__floatdidf = 0x400007f4;
+__floatdisf = 0x400007f8;
+__floatsidf = 0x400007fc;
+__floatsisf = 0x40000800;
+__floatundidf = 0x40000804;
+__floatundisf = 0x40000808;
+__floatunsidf = 0x4000080c;
+__floatunsisf = 0x40000810;
+__gcc_bcmp = 0x40000814;
+__gedf2 = 0x40000818;
+__gesf2 = 0x4000081c;
+__gtdf2 = 0x40000820;
+__gtsf2 = 0x40000824;
+__ledf2 = 0x40000828;
+__lesf2 = 0x4000082c;
+__lshrdi3 = 0x40000830;
+__ltdf2 = 0x40000834;
+__ltsf2 = 0x40000838;
+__moddi3 = 0x4000083c;
+__modsi3 = 0x40000840;
+__muldc3 = 0x40000844;
+__muldf3 = 0x40000848;
+__muldi3 = 0x4000084c;
+__mulsc3 = 0x40000850;
+__mulsf3 = 0x40000854;
+__mulsi3 = 0x40000858;
+__mulvdi3 = 0x4000085c;
+__mulvsi3 = 0x40000860;
+__nedf2 = 0x40000864;
+__negdf2 = 0x40000868;
+__negdi2 = 0x4000086c;
+__negsf2 = 0x40000870;
+__negvdi2 = 0x40000874;
+__negvsi2 = 0x40000878;
+__nesf2 = 0x4000087c;
+__paritysi2 = 0x40000880;
+__popcountdi2 = 0x40000884;
+__popcountsi2 = 0x40000888;
+__powidf2 = 0x4000088c;
+__powisf2 = 0x40000890;
+__subdf3 = 0x40000894;
+__subsf3 = 0x40000898;
+__subvdi3 = 0x4000089c;
+__subvsi3 = 0x400008a0;
+__truncdfsf2 = 0x400008a4;
+__ucmpdi2 = 0x400008a8;
+__udivdi3 = 0x400008ac;
+__udivmoddi4 = 0x400008b0;
+__udivsi3 = 0x400008b4;
+__udiv_w_sdiv = 0x400008b8;
+__umoddi3 = 0x400008bc;
+__umodsi3 = 0x400008c0;
+__unorddf2 = 0x400008c4;
+__unordsf2 = 0x400008c8;

components/esp_rom/esp32c3/ld/esp32c3.rom.newlib-nano.ld

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+/* ROM function interface esp32c3.rom.newlib-nano.ld for esp32c3
+ *
+ *
+ * Generated from ./interface-esp32c3.yml md5sum 93b28a9e1fe42d212018eb4336849208
+ *
+ * Compatible with ROM where ECO version equal or greater to 0.
+ *
+ * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
+ */
+
+/***************************************
+ Group newlib_nano_format
+ ***************************************/
+
+/* Functions */
+__sprint_r = 0x40000480;
+_fiprintf_r = 0x40000484;
+_fprintf_r = 0x40000488;
+_printf_common = 0x4000048c;
+_printf_i = 0x40000490;
+_vfiprintf_r = 0x40000494;
+_vfprintf_r = 0x40000498;
+fiprintf = 0x4000049c;
+fprintf = 0x400004a0;
+printf = 0x400004a4;
+vfiprintf = 0x400004a8;
+vfprintf = 0x400004ac;

components/esp_rom/esp32c3/ld/esp32c3.rom.newlib.ld

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+/* ROM function interface esp32c3.rom.newlib.ld for esp32c3
+ *
+ *
+ * Generated from ./interface-esp32c3.yml md5sum 93b28a9e1fe42d212018eb4336849208
+ *
+ * Compatible with ROM where ECO version equal or greater to 0.
+ *
+ * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
+ */
+
+/***************************************
+ Group newlib
+ ***************************************/
+
+/* Functions */
+esp_rom_newlib_init_common_mutexes = 0x40000350;
+memset = 0x40000354;
+memcpy = 0x40000358;
+memmove = 0x4000035c;
+memcmp = 0x40000360;
+strcpy = 0x40000364;
+strncpy = 0x40000368;
+strcmp = 0x4000036c;
+strncmp = 0x40000370;
+strlen = 0x40000374;
+strstr = 0x40000378;
+bzero = 0x4000037c;
+_isatty_r = 0x40000380;
+sbrk = 0x40000384;
+isalnum = 0x40000388;
+isalpha = 0x4000038c;
+isascii = 0x40000390;
+isblank = 0x40000394;
+iscntrl = 0x40000398;
+isdigit = 0x4000039c;
+islower = 0x400003a0;
+isgraph = 0x400003a4;
+isprint = 0x400003a8;
+ispunct = 0x400003ac;
+isspace = 0x400003b0;
+isupper = 0x400003b4;
+toupper = 0x400003b8;
+tolower = 0x400003bc;
+toascii = 0x400003c0;
+memccpy = 0x400003c4;
+memchr = 0x400003c8;
+memrchr = 0x400003cc;
+strcasecmp = 0x400003d0;
+strcasestr = 0x400003d4;
+strcat = 0x400003d8;
+strdup = 0x400003dc;
+strchr = 0x400003e0;
+strcspn = 0x400003e4;
+strcoll = 0x400003e8;
+strlcat = 0x400003ec;
+strlcpy = 0x400003f0;
+strlwr = 0x400003f4;
+strncasecmp = 0x400003f8;
+strncat = 0x400003fc;
+strndup = 0x40000400;
+strnlen = 0x40000404;
+strrchr = 0x40000408;
+strsep = 0x4000040c;
+strspn = 0x40000410;
+strtok_r = 0x40000414;
+strupr = 0x40000418;
+longjmp = 0x4000041c;
+setjmp = 0x40000420;
+abs = 0x40000424;
+div = 0x40000428;
+labs = 0x4000042c;
+ldiv = 0x40000430;
+qsort = 0x40000434;
+rand_r = 0x40000438;
+rand = 0x4000043c;
+srand = 0x40000440;
+utoa = 0x40000444;
+itoa = 0x40000448;
+atoi = 0x4000044c;
+atol = 0x40000450;
+strtol = 0x40000454;
+strtoul = 0x40000458;
+PROVIDE( fflush = 0x4000045c );
+PROVIDE( _fflush_r = 0x40000460 );
+PROVIDE( _fwalk = 0x40000464 );
+PROVIDE( _fwalk_reent = 0x40000468 );
+PROVIDE( __smakebuf_r = 0x4000046c );
+PROVIDE( __swhatbuf_r = 0x40000470 );
+PROVIDE( __swbuf_r = 0x40000474 );
+__swbuf = 0x40000478;
+PROVIDE( __swsetup_r = 0x4000047c );
+/* Data (.data, .bss, .rodata) */
+syscall_table_ptr = 0x3fcdffe0;
+_global_impure_ptr = 0x3fcdffdc;

components/esp_rom/esp32c3/ld/esp32c3.rom.version.ld

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+/* ROM version variables for esp32c3
+ *
+ * These addresses should be compatible with any ROM version for this chip.
+ *
+ * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
+ */
+_rom_chip_id = 0x40000010;
+_rom_eco_version = 0x40000014;