uart: fixed reset logic on ESP32-S3

This commit is contained in:
songruojing
2022-01-17 20:32:39 +08:00
committed by Michael (XIAO Xufeng)
parent d4334cc109
commit b6887416d4
3 changed files with 17 additions and 0 deletions

View File

@@ -695,6 +695,10 @@ config SOC_UART_SUPPORT_XTAL_CLK
bool
default y
config SOC_UART_REQUIRE_CORE_RESET
bool
default y
config SOC_USB_PERIPH_NUM
bool
default y

View File

@@ -273,6 +273,7 @@
#define SOC_UART_SUPPORT_WAKEUP_INT (1) /*!< Support UART wakeup interrupt */
#define SOC_UART_SUPPORT_RTC_CLK (1) /*!< Support RTC clock as the clock source */
#define SOC_UART_SUPPORT_XTAL_CLK (1) /*!< Support XTAL clock as the clock source */
#define SOC_UART_REQUIRE_CORE_RESET (1)
/*-------------------------- USB CAPS ----------------------------------------*/
#define SOC_USB_PERIPH_NUM 1