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mmu: improve vaddr range check

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This commit is contained in:
Armando
2022-04-25 21:49:35 +08:00
parent e09787d851
commit b748a4fe5e
8 changed files with 10 additions and 10 deletions
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4
components/hal/esp32/include/hal/cache_ll.h
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@@ -49,10 +49,10 @@ static inline cache_bus_mask_t cache_ll_l1_get_bus(uint32_t cache_id, uint32_t v
mask |= (vaddr_end >= IRAM1_CACHE_ADDRESS_LOW) ? CACHE_BUS_IBUS1 : 0;
mask |= (vaddr_end >= IROM0_CACHE_ADDRESS_LOW) ? CACHE_BUS_IBUS2 : 0;
} else if (vaddr_start >= DRAM1_CACHE_ADDRESS_LOW) {
HAL_ASSERT(vaddr_end < DRAM1_CACHE_ADDRESS_HIGH); //out of range, vaddr should be consecutive, see `ext_mem_defs.h`
HAL_ASSERT(vaddr_end <= DRAM1_CACHE_ADDRESS_HIGH); //out of range, vaddr should be consecutive, see `ext_mem_defs.h`
mask |= CACHE_BUS_DBUS1;
} else if (vaddr_start >= DROM0_CACHE_ADDRESS_LOW) {
HAL_ASSERT(vaddr_end < DROM0_CACHE_ADDRESS_HIGH); //out of range, vaddr should be consecutive, see `ext_mem_defs.h`
HAL_ASSERT(vaddr_end <= DROM0_CACHE_ADDRESS_HIGH); //out of range, vaddr should be consecutive, see `ext_mem_defs.h`
mask |= CACHE_BUS_DBUS0;
} else {
HAL_ASSERT(false);