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https://github.com/espressif/esp-idf.git
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refac(spi): update periph_module_xxx with rcc_automic_lock for periph bus
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@@ -20,6 +20,7 @@
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#include "esp_types.h"
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#include "soc/spi_periph.h"
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#include "soc/spi_struct.h"
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#include "soc/system_struct.h"
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#include "soc/lldesc.h"
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#include "hal/assert.h"
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#include "hal/misc.h"
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@@ -36,7 +37,7 @@ extern "C" {
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#define SPI_LL_ONE_LINE_USER_MASK (SPI_FWRITE_QUAD | SPI_FWRITE_DUAL)
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/// Swap the bit order to its correct place to send
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#define HAL_SPI_SWAP_DATA_TX(data, len) HAL_SWAP32((uint32_t)(data) << (32 - len))
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#define SPI_LL_GET_HW(ID) ((ID)==0? ({abort();NULL;}):&GPSPI2)
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#define SPI_LL_GET_HW(ID) (((ID)==1) ? &GPSPI2 : NULL)
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#define SPI_LL_DMA_MAX_BIT_LEN (1 << 18) //reg len: 18 bits
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#define SPI_LL_CPU_MAX_BIT_LEN (16 * 32) //Fifo len: 16 words
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@@ -90,6 +91,65 @@ typedef enum {
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/*------------------------------------------------------------------------------
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* Control
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*----------------------------------------------------------------------------*/
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/**
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* Enable peripheral register clock
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*
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* @param host_id Peripheral index number, see `spi_host_device_t`
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* @param enable Enable/Disable
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*/
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static inline void spi_ll_enable_bus_clock(spi_host_device_t host_id, bool enable) {
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switch (host_id)
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{
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case SPI1_HOST:
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SYSTEM.perip_clk_en0.spi01_clk_en = enable;
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break;
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case SPI2_HOST:
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SYSTEM.perip_clk_en0.spi2_clk_en = enable;
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break;
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default: HAL_ASSERT(false);
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}
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}
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/// use a macro to wrap the function, force the caller to use it in a critical section
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/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
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#define spi_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; spi_ll_enable_bus_clock(__VA_ARGS__)
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/**
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* Reset whole peripheral register to init value defined by HW design
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*
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* @param host_id Peripheral index number, see `spi_host_device_t`
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*/
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static inline void spi_ll_reset_register(spi_host_device_t host_id) {
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switch (host_id)
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{
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case SPI1_HOST:
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SYSTEM.perip_rst_en0.spi01_rst = 1;
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SYSTEM.perip_rst_en0.spi01_rst = 0;
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break;
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case SPI2_HOST:
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SYSTEM.perip_rst_en0.spi2_rst = 1;
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SYSTEM.perip_rst_en0.spi2_rst = 0;
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break;
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default: HAL_ASSERT(false);
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}
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}
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/// use a macro to wrap the function, force the caller to use it in a critical section
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/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
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#define spi_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; spi_ll_reset_register(__VA_ARGS__)
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/**
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* Enable functional output clock within peripheral
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*
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* @param host_id Peripheral index number, see `spi_host_device_t`
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* @param enable Enable/Disable
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*/
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static inline void spi_ll_enable_clock(spi_host_device_t host_id, bool enable)
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{
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spi_dev_t *hw = SPI_LL_GET_HW(host_id);
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HAL_ASSERT(hw != NULL);
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hw->clk_gate.clk_en = enable;
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}
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/**
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* Select SPI peripheral clock source (master).
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@@ -129,7 +189,6 @@ static inline void spi_ll_master_init(spi_dev_t *hw)
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hw->slave.val = 0;
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hw->user.val = 0;
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hw->clk_gate.clk_en = 1;
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hw->clk_gate.mst_clk_active = 1;
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hw->clk_gate.mst_clk_sel = 1;
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