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refac(spi): update periph_module_xxx with rcc_automic_lock for periph bus

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This commit is contained in:
wanlei
2023-10-10 16:50:13 +08:00
parent db4598e305
commit b81cafe42e
11 changed files with 594 additions and 39 deletions
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70
components/hal/esp32s3/include/hal/spi_ll.h
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@@ -20,6 +20,7 @@
#include "esp_types.h"
#include "soc/spi_periph.h"
#include "soc/spi_struct.h"
#include "soc/system_struct.h"
#include "soc/lldesc.h"
#include "hal/assert.h"
#include "hal/misc.h"
@@ -38,7 +39,7 @@ extern "C" {
/// Swap the bit order to its correct place to send
#define HAL_SPI_SWAP_DATA_TX(data, len) HAL_SWAP32((uint32_t)(data) << (32 - len))
#define SPI_LL_GET_HW(ID) ((ID)==0? ({abort();NULL;}):((ID)==1? &GPSPI2 : &GPSPI3))
#define SPI_LL_GET_HW(ID) (((ID)==1) ? &GPSPI2 : (((ID)==2) ? &GPSPI3 : NULL))
#define SPI_LL_DMA_MAX_BIT_LEN (1 << 18) //reg len: 18 bits
#define SPI_LL_CPU_MAX_BIT_LEN (16 * 32) //Fifo len: 16 words
@@ -92,6 +93,72 @@ typedef enum {
/*------------------------------------------------------------------------------
* Control
*----------------------------------------------------------------------------*/
/**
* Enable peripheral register clock
*
* @param host_id Peripheral index number, see `spi_host_device_t`
* @param enable Enable/Disable
*/
static inline void spi_ll_enable_bus_clock(spi_host_device_t host_id, bool enable) {
switch (host_id)
{
case SPI1_HOST:
SYSTEM.perip_clk_en0.spi01_clk_en = enable;
break;
case SPI2_HOST:
SYSTEM.perip_clk_en0.spi2_clk_en = enable;
break;
case SPI3_HOST:
SYSTEM.perip_clk_en0.spi3_clk_en = enable;
break;
default: HAL_ASSERT(false);
}
}
/// use a macro to wrap the function, force the caller to use it in a critical section
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define spi_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; spi_ll_enable_bus_clock(__VA_ARGS__)
/**
* Reset whole peripheral register to init value defined by HW design
*
* @param host_id Peripheral index number, see `spi_host_device_t`
*/
static inline void spi_ll_reset_register(spi_host_device_t host_id) {
switch (host_id)
{
case SPI1_HOST:
SYSTEM.perip_rst_en0.spi01_rst = 1;
SYSTEM.perip_rst_en0.spi01_rst = 0;
break;
case SPI2_HOST:
SYSTEM.perip_rst_en0.spi2_rst = 1;
SYSTEM.perip_rst_en0.spi2_rst = 0;
break;
case SPI3_HOST:
SYSTEM.perip_rst_en0.spi3_rst = 1;
SYSTEM.perip_rst_en0.spi3_rst = 0;
break;
default: HAL_ASSERT(false);
}
}
/// use a macro to wrap the function, force the caller to use it in a critical section
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define spi_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; spi_ll_reset_register(__VA_ARGS__)
/**
* Enable functional output clock within peripheral
*
* @param host_id Peripheral index number, see `spi_host_device_t`
* @param enable Enable/Disable
*/
static inline void spi_ll_enable_clock(spi_host_device_t host_id, bool enable)
{
spi_dev_t *hw = SPI_LL_GET_HW(host_id);
HAL_ASSERT(hw != NULL);
hw->clk_gate.clk_en = enable;
}
/**
* Select SPI peripheral clock source (master).
@@ -131,7 +198,6 @@ static inline void spi_ll_master_init(spi_dev_t *hw)
hw->slave.val = 0;
hw->user.val = 0;
hw->clk_gate.clk_en = 1;
hw->clk_gate.mst_clk_active = 1;
hw->clk_gate.mst_clk_sel = 1;