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i2s: fix only right case

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Closes: https://github.com/espressif/esp-idf/issues/8538
This commit is contained in:
laokaiyao
2022-04-05 15:47:16 +08:00
committed by Kevin (Lao Kaiyao)
parent d6d34b27a8
commit b99ced08a2
10 changed files with 290 additions and 26 deletions
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57
components/hal/esp32c3/include/hal/i2s_ll.h
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@@ -17,6 +17,7 @@
#include "soc/i2s_periph.h"
#include "soc/i2s_struct.h"
#include "hal/i2s_types.h"
#include "hal/i2s_types_priv.h"
#ifdef __cplusplus
extern "C" {
@@ -550,6 +551,62 @@ static inline void i2s_ll_rx_set_active_chan_mask(i2s_dev_t *hw, uint32_t chan_m
hw->rx_tdm_ctrl.val = tdm_ctrl_reg.val;
}
/**
* @brief Set I2S tx chan mode
*
* @param hw Peripheral I2S hardware instance address.
* @param slot_sel select slot to send data
*/
static inline void i2s_ll_tx_select_slot(i2s_dev_t *hw, i2s_std_slot_sel_t slot_sel)
{
/* In mono mode, there only should be one slot enabled, another inactive slot will transmit same data as enabled slot
* Otherwise always enable the first two slots */
hw->tx_tdm_ctrl.tx_tdm_tot_chan_num = 1; // tx_tdm_tot_chan_num = 2 slots - 1 = 1
hw->tx_tdm_ctrl.val &= ~I2S_LL_TDM_CH_MASK;
switch (slot_sel)
{
case I2S_STD_SLOT_ONLY_LEFT:
hw->tx_tdm_ctrl.val |= 0x02;
break;
case I2S_STD_SLOT_ONLY_RIGHT:
hw->tx_tdm_ctrl.val |= 0x01;
break;
case I2S_STD_SLOT_LEFT_RIGHT:
hw->tx_tdm_ctrl.val |= 0x03;
break;
default:
break;
}
}
/**
* @brief Set I2S rx chan mode
*
* @param hw Peripheral I2S hardware instance address.
* @param slot_sel select slot to receive data
*/
static inline void i2s_ll_rx_select_slot(i2s_dev_t *hw, i2s_std_slot_sel_t slot_sel)
{
/* In mono mode, there only should be one slot enabled, another inactive slot will transmit same data as enabled slot
* Otherwise always enable the first two slots */
hw->rx_tdm_ctrl.rx_tdm_tot_chan_num = 1; // rx_tdm_tot_chan_num = 2 slots - 1 = 1
hw->rx_tdm_ctrl.val &= ~I2S_LL_TDM_CH_MASK;
switch (slot_sel)
{
case I2S_STD_SLOT_ONLY_LEFT:
hw->rx_tdm_ctrl.val |= 0x02;
break;
case I2S_STD_SLOT_ONLY_RIGHT:
hw->rx_tdm_ctrl.val |= 0x01;
break;
case I2S_STD_SLOT_LEFT_RIGHT:
hw->rx_tdm_ctrl.val |= 0x03;
break;
default:
break;
}
}
/**
* @brief Set TX WS signal pol level
*